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| 型号： | P87C766BDR |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | Microcontrollers for PAL/SECAM TV with OSD and VST |
| 中文描述： | 8-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PDIP42 |
| 封装： | 0.600 INCH, PLASTIC, SDIP-42 |
| 文件页数： | 17/92页 |
| 文件大小： | 382K |
| 代理商： | P87C766BDR |
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1999 Mar 10
17
Philips Semiconductors
Product specification
Microcontrollers for PAL/SECAM TV
with OSD and VST
P8xCx66 family
10 I
2
C-BUS SERIAL I/O
10.1
The I
2
C-bus
The serial port supports the two line I
2
C-bus. The I
2
C-bus
consists of a serial data line (SDA) and a serial clock line
(SCL). These lines can also function as I/O port lines
P1.6 and P1.5 respectively. To utilize this facility pins
P1.5/SCL and P1.6/SDA must be configured as alternative
functions instead of port lines; see Section 10.8.
The system is unique because data transport, clock
generation, address recognition and bus control arbitration
are all controlled by hardware.
Full details of the I
2
C-bus are given in the document
“The I
2
C-bus and how to use it” This document may be
ordered using the code 9398 393 40011.
10.2
Operation modes
The I
2
C-bus serial I/O has complete autonomy in byte
handling and operates in four modes
Master transmitter
Master receiver
Slave transmitter
Slave receiver.
These functions are controlled by the S1CON register.
S1STA is the status register whose contents may also be
used as a vector to various service routines. S1DAT is the
data shift register and S1ADR the slave address register.
Slave address recognition is performed by hardware.
Fig.9 Block diagram of I
2
C-bus serial I/O.
handbook, full pagewidth
MBC749 - 1
SLAVE ADDRESS
S1ADR
GC
SHIFT REGISTER
S1DAT
SDA
ARBITRATION LOGIC
SCL
BUS CLOCK GENERATOR
S1STA
I
7
6
5
4
3
2
1
0
S1CON
7
6
5
4
3
2
1
0
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| P87LPC760BDH | 功能描述:8位微控制器 -MCU 80C51 1K/128 OTP RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
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