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| 型号： | P89C557E6 |
| 厂商： | NXP Semiconductors N.V. |
| 英文描述： | Single-chip 8-bit microcontroller(单片8位微控制器) |
| 中文描述： | 单芯片8位微控制器（单片8位微控制器） |
| 文件页数： | 9/64页 |
| 文件大小： | 476K |
| 代理商： | P89C557E6 |
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Philips Semiconductors
Product specification
P83C557E6/P80C557E6
Single-chip 8-bit microcontroller
1999 Mar 02
9
6.2
The central processing unit (CPU) manipulates operands in three
memory spaces; these are the 64 Kbytes external data memory,
1536 bytes internal data memory (consisting of 256 bytes standard
RAM and 1280 bytes AUX–RAM) and the 48 Kbytes internal and/or
64 Kbytes external program memory (see Figure 4).
Memory Organization
6.2.1
The program memory of the P8xC557E6 consists of 48 Kbytes
ROM on–chip, externally expandable up to 64 Kbytes. If, during
RESET, the EA pin was held HIGH, the P8xC557E6 executes out of
the internal program memory unless the address exceeds 0BFFFH.
Locations 0C000H through 0FFFFH are then fetched from the
external program memory. If the EA pin was held LOW during
RESET the P8xC557E6 fetches all instructions from the external
program memory. The EA input is latched during RESET and is
don’t care after RESET.
Program Memory
The internal program memory content is protected, by setting a
mask programmable security bit (ROM), i.e., it cannot be read out at
any time by any test mode or by any instruction in the external
program memory space. The MOVC instructions are the only ones
which have access to program code in the internal or external
program memory. The EA input is latched during RESET and is
‘don’t care’ after RESET. This implementation prevents from reading
internal program code by switching from external program memory
to internal program memory during MOVC instruction or an
instruction that handles immediate data. Table 1 lists the access to
the internal and external program memory with MOVC instructions
when the security feature has been activated.
6.2.2
The internal data memory is divided into three physically separated
parts:
Internal Data Memory
256 bytes of RAM, 1280 bytes of AUX–RAM, and a 128 bytes
special function area. These can be addressed each in a different
way (see also Table 2).
– RAM 0 to 127 can be addressed directly and indirectly as in the
80C51.
Address pointers are R0 and R1 of the selected registerbank.
– RAM 128 to 255 can only be addressed indirectly.
Address pointers are R0 and R1 of the selected registerbank.
– AUX–RAM 0 to 1279 is also indirectly addressable as external
DATA MEMORY locations 0 to 1279 via MOVX–Datapointer
instruction, unless it is disabled by setting ARD = 1.
AUX–RAM 0 to 1279 is indirectly addressable via pageregister
(XRAMP) and MOVX–Ri instructions, unless it is disabled by
setting ARD = 1 (see Figure 5).
When executing from internal program memory, an access to
AUX–RAM 0 to 1279 will not affect the ports P0, P2, P3.6 and
P3.7.
An access to external DATA MEMORY locations higher than 1279
will be performed with the MOVX @ DPTR instructions in the
same way as in the 80C51 structure, so with P0 and P2 as
data/address bus and P3.6 and P3.7 as write and read timing
signals. Note that the external DATA MEMORY cannot be
accessed with R0 and R1 as address pointer if the AUX–RAM is
enabled (ARD = 0, default).
– The Special Function Registers (SFR) can only be addressed
directly in the address range from 128 to 255 (see Table 5).
– Four register banks, each 8 registers wide, occupy locations 0
through 31 in the lower RAM area. Only one of these banks may
be enabled at a time. The next 16 bytes, locations 32 through 47,
contain 128 directly addressable bit locations.The stack can be
located anywhere in the internal 256 bytes RAM.The stack depth
is only limited by the available internal RAM space of 256 bytes
(see Figure 7).
All registers except the program counter and the four register
banks reside in the Special Function Register address space.
Table 1.
Memory access by the MOVC instruction for protected ROMs
MOVC LOCATION
ACCESS TO INTERNAL
PROGRAM MEMORY
ACCESS TO EXTERNAL
PROGRAM MEMORY
MOVC in internal program memory
YES
YES
MOVC in external program memory
NOTE:
1. If the security feature has not been activated, there are no restrictions for MOVC instructions
.
NO
YES
Table 2.
Internal data memory map
LOCATION
ADDRESSED
RAM
0 to 127
Direct and indirect
AUX–RAM
0 to 1279
Indirect only with MOVX
RAM
128 to 255
Indirect only
SFR
128 to 255
Direct only
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