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参数资料
| 型号： | P89C662 |
| 厂商： | NXP Semiconductors N.V. |
| 英文描述： | 80C51 8-Bit Flash Microcontroller 32KB ISP/IAP FLASH with 1KB RAM(80C51 8位闪速微控制器，带16KB ISP/IAP闪速存储器和1KB RAM) |
| 中文描述： | 80C51的8位闪存微控制器具有32KB的ISP /联合会与1kB的内存（80C51的8位闪速微控制器，带16KB的供应商/联合会闪速存储器和闪存的1kB的RAM） |
| 文件页数： | 17/89页 |
| 文件大小： | 490K |
| 代理商： | P89C662 |
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Philips Semiconductors
Product data
P89C660/P89C662/P89C664/
P89C668
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/1KB/2KB/8KB RAM
2002 Oct 28
17
INTERNAL BUS
8
BSD7
S1DAT
ACK
SCL
SDA
SHIFT PULSES
SU00969
Figure 6. Serial Input/Output Configuration
SHIFT IN
SDA
SCL
D7
D6
D5
D4
D3
D2
D1
D0
A
SHIFT ACK & S1DAT
ACK
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
A
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
(1)
S1DAT
SHIFT BSD7
BSD7
D7
D6
D5
D4
D3
D2
D1
D0
(3)
LOADED BY THE CPU
(1) Valid data in S1DAT
(2) Shifting data in S1DAT and ACK
(3) High level on SDA
SHIFT OUT
SU00970
Figure 7. Shift-in and Shift-out Timing
In the following text, it is assumed that ENS1 = “1”.
The “START” Flag, STA:
STA = “1”: When the STA bit is set to
enter a Master mode, the SIO1 hardware checks the status of the
I2C bus and generates a START condition if the bus is free. If the
bus is not free, then SIO1 waits for a STOP condition (which will free
the bus) and generates a START condition after a delay of half a
clock period of the internal serial clock generator.
If STA is set while SIO1 is already in a Master mode and one or
more bytes are transmitted or received, SIO1 transmits a repeated
START condition. STA may be set at any time. STA may also be set
when SIO1 is an addressed slave.
STA = “0”: When the STA bit is reset, no START condition or
repeated START condition will be generated.
The STOP Flag, STO:
STO = “1”: When the STO bit is set while
SIO1 is in a Master mode, a STOP condition is transmitted to the
I
2
C bus. When the STOP condition is detected on the bus, the SIO1
hardware clears the STO flag. In a Slave mode, the STO flag may
be set to recover from an error condition. In this case, no STOP
condition is transmitted to the I
2
C bus. However, the SIO1 hardware
behaves as if a STOP condition has been received and switches to
the defined “not addressed” Slave Receiver mode. The STO flag is
automatically cleared by hardware.
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PDF描述 |
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| P89C668HFA | 80C51 8-bit Flash microcontroller family 64KB ISP FLASH with 8KB RAM |
| P89C668 | 80C51 8-bit Flash microcontroller family 64KB ISP FLASH with 8KB RAM |
| P89C668HBBD | 80C51 8-bit Flash microcontroller family 64KB ISP FLASH with 8KB RAM |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| P89C662HBA | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:80C51 8-bit Flash microcontroller family |
| P89C662HBA/00,512 | 功能描述:IC 80C51 MCU FLASH 32K 44-PLCC RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:89C 产品培训模块:MCU Product Line Introduction XMEGA Introduction AVR XMEGA USB Connectivity 标准包装:90 系列:AVR® XMEGA 核心处理器:AVR 芯体尺寸:8/16-位 速度:32MHz 连通性:I²C，IrDA，SPI，UART/USART 外围设备:欠压检测/复位，DMA，POR，PWM，WDT 输入/输出数:50 程序存储器容量:192KB（96K x 16） 程序存储器类型:闪存 EEPROM 大小:4K x 8 RAM 容量:16K x 8 电压 - 电源 (Vcc/Vdd):1.6 V ~ 3.6 V 数据转换器:A/D 16x12b; D/A 2x12b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:64-TQFP 包装:托盘 配用:ATSTK600-RC14-ND - STK600 SOCKET/ADAPTER 64TQFPATSTK600-TQFP64-ND - STK600 SOCKET/ADAPTER 64-TQFPATAVRONEKIT-ND - KIT AVR/AVR32 DEBUGGER/PROGRMMRATAVRISP2-ND - PROGRAMMER AVR IN SYSTEM |
| P89C662HBBD | 制造商: 功能描述: 制造商:undefined 功能描述: |
| P89C662HBBD/00,557 | 制造商:NXP Semiconductors 功能描述: |
| P89C662HFA | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:80C51 8-bit Flash microcontroller family |
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