参数资料
型号: P89CV51RD2FBC,557
厂商: NXP Semiconductors
文件页数: 60/76页
文件大小: 0K
描述: IC 80C51 MCU FLASH 64K 44-TQFP
产品培训模块: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
标准包装: 800
系列: 89C
核心处理器: 8051
芯体尺寸: 8-位
速度: 40MHz
连通性: EBI/EMI,SPI,UART/USART
外围设备: POR,PWM,WDT
输入/输出数: 32
程序存储器容量: 64KB(64K x 8)
程序存储器类型: 闪存
RAM 容量: 1K x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 44-TQFP
包装: 托盘
其它名称: 568-4257
935284103557
P89CV51RD2FBC
P89CV51RB2_RC2_RD2_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 25 August 2009
63 of 76
NXP Semiconductors
P89CV51RB2/RC2/RD2
80C51 with 1 kB RAM, SPI
9.1 Explanation of symbols
Each timing symbol used in Figure 29 to Figure 33 has 5 characters. The rst character is
always a ‘t’ (stands for time). The other characters, depending on their positions, stand for
the name of a signal or the logical status of that signal. The following is a list of all the
characters and what they stand for.
A — Address
C — Clock
D — Input data
H — Logic level HIGH
I — Instruction (program memory contents)
L — Logic level LOW or ALE
P — PSEN
Q — Output data
R — RD signal
T — cycle Time
V — Valid
W — WR signal
X — No longer a valid logic level
Z — High impedance (oat)
Example:
tAVLL = Address valid to ALE LOW time
tLLPL = ALE LOW to PSEN LOW time
Fig 29. External program memory read cycle
002aaa548
port 2
PSEN
ALE
A0 to A7
tLLAX
tPLAZ
tPXIZ
tLLPL
tAVIV
tAVLL
tLLIV
tPLIV
tPLPH
INSTR IN
A8 to A15
A0 to A7
port 0
tPXIX
tPXAV
tLHLL
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