参数资料
型号: P89LPC912
厂商: NXP Semiconductors N.V.
英文描述: 8-bit microcontrollers with two-clock 80C51 core 1 kB 3 V Flash with 128-byte RAM
中文描述: 8位微控制器两个小时80C51的核心具有1KB 3伏闪光的128字节RAM
文件页数: 9/63页
文件大小: 314K
代理商: P89LPC912
Philips Semiconductors
P89LPC912/913/914
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 03 — 17 December 2004
9 of 63
9397 750 14468
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P2.2 to P2.5
I/O
Port 2:
Port 2 is a 4-bit I/O port with a user-configurable output type. During reset
Port 2 latches are configured in the input only mode with the internal pull-up disabled.
The operation of Port 2 pins as inputs and outputs depends upon the port
configuration selected. Each port pin is configured independently. Refer to
Section
9.11.1 “Port configurations”
and
Table 13 “DC electrical characteristics”
for details.
All pins have Schmitt triggered inputs.
Port 2 also provides various special functions as described below:
P2.2 —
Port 2 bit 2.
MOSI —
SPI master out slave in. When configured as master, this pin is output, when
configured as slave, this pin is input.
P2.3 —
Port 2 bit 3.
MISO —
SPI master in slave out. When configured as master, this pin is input, when
configured as slave, this pin is output.
P2.4 —
Port 2 bit 4.
SS —
SPI Slave select.
P2.5 —
Port 2 bit 5.
SPICLK —
SPI clock. When configured as master, this pin is output, when configured
as slave, this pin is input.
Port 3:
Port 3 is a 2-bit I/O port with a user-configurable output type. During reset
Port 3 latches are configured in the input only mode with the internal pull-up disabled.
The operation of Port 3 pins as inputs and outputs depends upon the port
configuration selected. Each port pin is configured independently. Refer to
Section
9.11.1 “Port configurations”
and
Table 13 “DC electrical characteristics”
for details.
All pins have Schmitt triggered inputs.
Port 3 also provides various special functions as described below:
P3.0 —
Port 3 bit 0.
XTAL2 —
Output from the oscillator amplifier (when a crystal oscillator option is
selected via the FLASH configuration).
CLKOUT —
CPU clock divided by 2 when enabled via SFR bit (ENCLK - TRIM.6). It
can be used if the CPU clock is the internal RC oscillator, Watchdog oscillator or
external clock input, except when XTAL1/XTAL2 are used to generate clock source for
the Real-Time clock/system timer.
P3.1 —
Port 3 bit 1.
XTAL1 —
Input to the oscillator circuit and internal clock generator circuits (when
selected via the FLASH configuration). It can be a port pin if internal RC oscillator or
Watchdog oscillator is used as the CPU clock source,
and
if XTAL1/XTAL2 are not
used to generate the clock for the Real-Time clock/system timer.
Ground:
0 V reference.
Power Supply:
This is the power supply voltage for normal operation as well as Idle
and Power-down modes.
1
I/O
I/O
14
I/O
I/O
9
I/O
I
I/O
I/O
2
P3.0 to P3.1
I/O
8
I/O
O
O
7
I/O
I
V
SS
V
DD
4
10
I
I
Table 3:
Symbol
P89LPC912 pin description
…continued
Pin
Type
Description
相关PDF资料
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