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参数资料
| 型号： | P89LPC9321FA,112 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 43/71页 |
| 文件大小： | 0K |
| 描述： | IC 80C51 MCU FLASH 8K 28-PLCC |
| 标准包装： | 2,368 |
| 系列： | LPC900 |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 18MHz |
| 连通性： | I²C，SPI，UART/USART |
| 外围设备： | 欠压检测/复位，POR，PWM，WDT |
| 输入/输出数： | 26 |
| 程序存储器容量： | 8KB（8K x 8） |
| 程序存储器类型： | 闪存 |
| EEPROM 大小： | 512 x 8 |
| RAM 容量： | 768 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2.4 V ~ 3.6 V |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 28-PLCC |
| 包装： | 管件 |
| 产品目录页面： | 706 (CN2011-ZH PDF) |
| 配用： | 568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART 568-3510-ND - DEMO BOARD SPI/I2C TO UART 622-1003-ND - KIT FOR LCD DEMO 568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X 568-1758-ND - BOARD EVAL FOR LPC93X MCU FAMILY |
| 其它名称： | 568-4698-5 935287628112 P89LPC9321FA |
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P89LPC9321
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 16 November 2010
48 of 71
NXP Semiconductors
P89LPC9321
8-bit microcontroller with accelerated two-clock 80C51 core
7.30.8 ISP
ISP is performed without removing the microcontroller from the system. The ISP facility
consists of a series of internal hardware resources coupled with internal firmware to
facilitate remote programming of the P89LPC9321 through the serial port. This firmware is
provided by NXP and embedded within each P89LPC9321 device. The NXP ISP facility
has made in-system programming in an embedded application possible with a minimum
of additional expense in components and circuit board area. The ISP function uses five
pins (VDD, VSS, TXD, RXD, and RST). Only a small connector needs to be available to
interface your application to an external circuit in order to use this feature.
7.30.9 Power-on reset code execution
The P89LPC9321 contains two special flash elements: the Boot Vector and the Boot
Status bit. Following reset, the P89LPC9321 examines the contents of the Boot Status bit.
If the Boot Status bit is set to zero, power-up execution starts at location 0000H, which is
the normal start address of the user’s application code. When the Boot Status bit is set to
a value other than zero, the contents of the Boot Vector are used as the high byte of the
execution address and the low byte is set to 00H.
Table 8 shows the factory default Boot Vector setting for these devices. A factory-provided
boot loader is pre-programmed into the address space indicated and uses the indicated
boot loader entry point to perform ISP functions. This code can be erased by the user.
Remark: Users who wish to use this loader should take precautions to avoid erasing the
1 kB sector that contains this boot loader. Instead, the page erase function can be used to
erase the first eight 64-byte pages located in this sector.
A custom boot loader can be written with the Boot Vector set to the custom boot loader, if
desired.
7.30.10 Hardware activation of the boot loader
The boot loader can also be executed by forcing the device into ISP mode during a
power-on sequence (see the P89LPC9321 User manual for specific information). This has
the same effect as having a non-zero status byte. This allows an application to be built
that will normally execute user code but can be manually forced into ISP operation. If the
factory default setting for the boot vector (1FH) is changed, it will no longer point to the
factory pre-programmed ISP boot loader code. After programming the flash, the status
byte should be programmed to zero in order to allow execution of the user’s application
code beginning at address 0000H.
7.31 User configuration bytes
Some user-configurable features of the P89LPC9321 must be defined at power-up and
therefore cannot be set by the program after start of execution. These features are
configured through the use of the flash byte UCFG1 and UCFG2. Please see the
P89LPC9321 User’s Manual for additional details.
Table 8.
Default boot vector values and ISP entry points
Device
Default
boot vector
Default
boot loader
entry point
Default boot loader
code range
1 kB sector
range
P89LPC9321
1FH
1F00H
1E00H to 1FFFH
1C00H to 1FFFH
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相关代理商/技术参数 |
参数描述 |
|---|---|
| P89LPC9321FDH | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM |
| P89LPC9321FDH,512 | 功能描述:8位微控制器 -MCU 8B MCU 2-CLOCK 80C51 8KB 3V 512B EEPROM RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| P89LPC9321FDH,518 | 功能描述:8位微控制器 -MCU Enhanced LPC932A1 RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| P89LPC9321FN | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core 8 kB 3 V byte-erasable flash with 512-byte data EEPROM |
| P89LPC9321FN,112 | 功能描述:8位微控制器 -MCU Enhanced LPC932A1 RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
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