参数资料
| 型号： | P89LPC980FDH,529 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 27/85页 |
| 文件大小： | 0K |
| 描述： | MCU 80C51 4KB FLASH 28TSSOP |
| 标准包装： | 51 |
| 系列： | LPC900 |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 18MHz |
| 连通性： | I²C，SPI，UART/USART |
| 外围设备： | 欠压检测/复位，POR，PWM，WDT |
| 输入/输出数： | 26 |
| 程序存储器容量： | 4KB（4K x 8） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 256 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2.4 V ~ 5.5 V |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 28-TSSOP（0.173"，4.40mm 宽） |
| 包装： | 管件 |
| 其它名称： | 568-8750-5 P89LPC980FDH,529-ND |
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P89LPC980_982_983_985
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 4 — 15 June 2010
33 of 85
NXP Semiconductors
P89LPC980/982/983/985
8-bit microcontroller with accelerated two-clock 80C51 core
7.2 Enhanced CPU
The P89LPC980/982/983/985 uses an enhanced 80C51 CPU which runs at six times the
speed of standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and
most instructions execute in one or two machine cycles.
7.3 Clocks
7.3.1 Clock definitions
The P89LPC980/982/983/985 device has several internal clocks as defined below:
OSCCLK — Input to the DIVM clock divider. OSCCLK is selected from one of four clock
sources (see Figure 9) and can also be optionally divided to a slower frequency (see
Remark: fosc is defined as the OSCCLK frequency.
CCLK — CPU clock; output of the clock divider. There are two CCLK cycles per machine
cycle, and most instructions are executed in one to two machine cycles (two or four CCLK
cycles).
RCCLK — The internal 7.373 MHz RC oscillator output. The clock doubler option, when
enabled, provides an output frequency of 14.746 MHz.
PCLK — Clock for the various peripheral devices and is CCLK2.
7.3.2 CPU clock (OSCCLK)
The P89LPC980/982/983/985 provides several user-selectable oscillator options in
generating the CPU clock. This allows optimization for a range of needs from high
precision to lowest possible cost. These options are configured when the flash is
programmed and include an on-chip watchdog oscillator, an on-chip RC oscillator, an
oscillator using an external crystal, or an external clock source.
7.4 Crystal oscillator option
The crystal oscillator option can be optimized for low, medium, or high frequency crystals
covering a range from 20 kHz to 18 MHz. It can be the clock source of OSCCLK and RTC.
The low speed oscillator option can be the clock source of the WDT.
7.4.1 Low speed oscillator option
This option supports an external crystal in the range of 20 kHz to 100 kHz. Ceramic
resonators are also supported in this configuration.
7.4.2 Medium speed oscillator option
This option supports an external crystal in the range of 100 kHz to 4 MHz. Ceramic
resonators are also supported in this configuration.
7.4.3 High speed oscillator option
This option supports an external crystal in the range of 4 MHz to 18 MHz. Ceramic
resonators are also supported in this configuration.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| P89LPC982 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB wide-voltage byte-erasable flash with 10-bit ADC |
| P89LPC982FA | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB wide-voltage byte-erasable flash with 10-bit ADC |
| P89LPC982FA,529 | 功能描述:8位微控制器 -MCU 8b MICROCNTR ACCLRTD TWO CLK 80C51 CORE RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| P89LPC982FDH | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB wide-voltage byte-erasable flash with 10-bit ADC |
| P89LPC982FDH,529 | 功能描述:8位微控制器 -MCU 8b MICROCNTR ACCLRTD TWO CLK 80C51 CORE RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
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