- 您现在的位置：买卖IC网 > PDF目录367725 > P8xCL580HFH (NXP Semiconductors N.V.) Low voltage 8-bit microcontrollers with UART, I2C-bus and ADC PDF资料下载
参数资料
| 型号： | P8xCL580HFH |
| 厂商： | NXP Semiconductors N.V. |
| 英文描述： | Low voltage 8-bit microcontrollers with UART, I2C-bus and ADC |
| 中文描述： | 低电压8 - UART的，位微控制器的I2C总线和ADC |
| 文件页数： | 33/80页 |
| 文件大小： | 366K |
| 代理商： | P8XCL580HFH |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页当前第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页
1997 Mar 14
33
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART, I
2
C-bus and ADC
P80CL580; P83CL580
16 STANDARD SERIAL INTERFACE SIO0: UART
This serial port is full duplex which means that it can
transmit and receive simultaneously. It is also
receive-buffered and can commence reception of a
second byte before a previously received byte has been
read from the register. (However, if the first byte has not
been read by the time the reception of the second byte is
complete, one of the bytes will be lost). The serial port
receive and transmit registers are both accessed via the
Special Function Register S0BUF. Writing to S0BUF loads
the transmit register and reading S0BUF accesses a
physically separate receive register.
The serial port can operate in 4 modes:
Mode 0 Serial data enters and exits through RXD.
TXD outputs the shift clock. Eight bits are
transmitted/received (LSB first). The baud rate is
fixed at
1
12
×
f
osc
. See Figs 19 and 20.
Mode 1 10 bits are transmitted (through TXD) or received
(through RXD): a start bit (logic 0), 8 data bits
(LSB first), and a stop bit (logic 1). On receive,
the stop bit goes into RB8 in Special Function
Register S0CON. The baud rate is variable.
See Figs 21 and 22.
Mode 2 11 bits are transmitted (through TXD) or received
(through RXD): start bit (logic 0), 8 data bits (LSB
first), a programmable 9
th
data bit, and a stop bit
(logic 1). On transmit, the 9
th
data bit (TB8 in
S0CON) can be assigned the value of a logic 0 or
logic 1. Or, for example, the parity bit (P, in the
PSW) could be moved into TB8. On receive, the
9
th
data bit goes into RB8 in S0CON, while the
stop bit is ignored. The baud rate is
programmable to either
1
32
or
1
64
×
f
osc
.
See Figs 23 and 24.
Mode 3 11 bits are transmitted (through TXD) or received
(through RXD): a start bit (logic 0), 8 data bits
(LSB first), a programmable 9
th
data bit and a
stop bit (logic 1). In fact, Mode 3 is the same as
Mode 2 in all respects except baud rate.
The baud rate in Mode 3 is variable.
See Figs 25 and 26.
In all four modes, transmission is initiated by any
instruction that uses S0BUF as a destination register.
Reception is initiated in Mode 0 by the condition RI = 0 and
REN = 1. Reception is initiated in the other modes by the
incoming start bit if REN = 1.
16.1
Multiprocessor communications
Modes 2 and 3 have a special provision for multiprocessor
communications. In these modes, 9 data bits are received.
The 9
th
bit goes into RB8. The following bit is the stop bit.
The port can be programmed such that when the stop bit
is received, the serial port interrupt will be activated, but
only if RB8 = 1. This feature is enabled by setting bit SM2
in S0CON. One use of this feature, in multiprocessor
systems, is as follows.
When the master processor wants to transmit a block of
data to one of several slaves, it first sends out an address
byte which identifies the target slave. An address byte
differs from a data byte in that the 9
th
bit is HIGH in an
address byte and LOW in a data byte. With SM2 = 1, no
slave will be interrupted by a data byte. An address byte,
however, will interrupt all slaves, so that each slave can
examine the received byte and see if it is being addressed.
The addressed slave will clear its SM2 bit and prepare to
receive the data bytes that will be sent. The slaves that
were not being addressed leave their SM2 bits set and go
on about their business, ignoring the coming data bytes.
SM2 has no effect in Mode 0, and in Mode 1 can be used
to check the validity of the stop bit. In a Mode 1 reception,
if SM2 = 1, the receive interrupt will not be activated unless
a valid stop bit is received.
相关PDF资料 |
PDF描述 |
|---|---|
| P8xCL580HFT | Low voltage 8-bit microcontrollers with UART, I2C-bus and ADC |
| P8216 | Four-Bit Parallel Bidirectional Bus Driver |
| P8226 | Four-Bit Parallel Bidirectional Bus Driver |
| P82284-6 | CPU System Clock Generator |
| D82284-6 | CPU System Clock Generator |
相关代理商/技术参数 |
参数描述 |
|---|---|
| P8XCL580HFT | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Low voltage 8-bit microcontrollers with UART, I2C-bus and ADC |
| P8Z77 DELUXE | 制造商:Asus 功能描述:P8Z77-V Deluxe ATX Motherboard |
| P8Z77 M PRO | 制造商:Asus 功能描述:P8Z77-M Pro MicroATX Motherboard |
| P8Z77 V | 制造商:Asus 功能描述:P8Z77-V ATX Motherboard |
| P8Z77 V PRO | 制造商:Asus 功能描述:P8Z77-V Pro ATX Motherboard |
发布紧急采购，3分钟左右您将得到回复。