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1
Issue B – 04/24/08
PACVGA201
VGA Port Companion Circuit
Features
Seven channels of ESD protection for all VGA port
connector pins
Meets IEC-61000-4-2 Level-4 ESD requirements
(8kV contact discharge)
Very low loading capacitance from ESD protection
diodes on VIDEO lines, 4pF typical
TTL to CMOS level-translating buffers with power
down mode for HSYNC and VSYNC lines
Three power supplies for design flexibility
Compact 16-pin QSOP package
RoHS compliant (lead-free) finishing
Applications
ESD protection and termination resistors for VGA
(video) port interfaces
Desktop PCs
Notebook computers
LCD monitors
Product Description
The PACVGA201 provides seven channels of ESD pro-
tection for all signal lines commonly found in a VGA
port. ESD protection is implemented with current-steer-
ing diodes designed to safely handle the high surge
currents encountered with IEC-61000-4-2 Level-4 ESD
Protection (8kV contact discharge). When a channel is
subjected to an electrostatic discharge, the ESD cur-
rent pulse is diverted via the protection diodes into the
positive supply rail or ground where it may be safely
dissipated.
Separate positive supply rails are provided for the
VIDEO, DDC_OUT and SYNC channels to facilitate
interfacing with low-voltage video controller ICs and to
provide design flexibility in multiple-supply-voltage
environments.
An internal diode (D1, in schematic below) is provided
such that VCC2 is derived from VCC3 (VCC2 does not
require an external power supply input). In applications
where VCC3 may be powered down, diode D1 blocks
any DC current path from the DDC_OUT pins back to
the powered down VCC3 rail via the upper ESD protec-
tion diodes. (cont’d next page)
Simplified Electrical Schematic
VIDEO_1
VIDEO_2
VIDEO_3
VCC1
GND
SYNC_OUT2
GND
VCC2
VCC3
SYNC_OUT1
SYNC_IN2
SYNC_IN1
DDC_OUT2
DDC_OUT1
PWR_UP
RB
RP
GND
3
4
5
6
9
10
11
13
1
8
2
7
12
14
SD2
16
SD1
15
D1