参数资料
型号: PALCE16V8H-5JC/5
厂商: LATTICE SEMICONDUCTOR CORP
元件分类: PLD
英文描述: EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic
中文描述: EE PLD, 5 ns, PQCC20
封装: PLASTIC, LCC-20
文件页数: 17/32页
文件大小: 635K
代理商: PALCE16V8H-5JC/5
24
PALCE16V8Z-25 (Com’l, Ind)
USE
GAL
DEVICES
FOR
NEW
DESIGNS
CAPACITANCE1
Note:
1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modied where
capacitance may be affected.
SWITCHING CHARACTERISTICS OVER COMMERCIAL AND INDUSTRIAL
OPERATING RANGES1
Notes:
1. See “Switching Test Circuit” for test conditions.
2. This parameter is tested in standby mode.
3. This parameter is tested in Standby Mode. When the device is not in Standby Mode, the tPD will typically be 2 ns faster.
4. These parameters are not 100% tested, but are calculated at initial characterization and at any time the design is modied where
frequency may be affected.
5. tCF is a calculated value and is not guaranteed. tCF can be found using the following equation:
tCF = 1/fMAX (internal feedback) – tS.
Parameter
Symbol
Parameter Description
Test Conditions
Typ
Unit
CIN
Input Capacitance
VIN = 2.0 V
VCC = 5.0 V, TA = 25 °C,
5
pF
COUT
Output Capacitance
VOUT = 2.0 V
f = 1 MHz
8
pF
Parameter
Symbol
Parameter Description
-25
Unit
Min 2
Max
tPD
Input or Feedback to Combinatorial Output (Note 3)
25
ns
tS
Setup Time from Input or Feedback to Clock
20
ns
tH
Hold Time
0ns
tCO
Clock to Output
10
ns
tWL
Clock Width
LOW
8ns
tWH
HIGH
8ns
fMAX
Maximum
Frequency (Notes 4
and 5)
External Feedback
1/(tS+tCO)
33.3
MHz
Internal Feedback (fCNT)
1/(tS+tCF)
50
MHz
No Feedback
1/(tWH+tWL)
50
MHz
tPZX
OE to Output Enable
25
ns
tPXZ
OE to Output Disable
25
ns
tEA
Input to Output Enable Using Product Term Control
25
ns
tER
Input to Output Disable Using Product Term Control
25
ns
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