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参数资料
| 型号： | PALCE16V8Q-10JC/5 |
| 厂商： | LATTICE SEMICONDUCTOR CORP |
| 元件分类： | PLD |
| 英文描述： | EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic |
| 中文描述： | EE PLD, 10 ns, PQCC20 |
| 封装： | PLASTIC, LCC-20 |
| 文件页数： | 1/32页 |
| 文件大小： | 635K |
| 代理商： | PALCE16V8Q-10JC/5 |
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Publication# 16493
Rev: F
Amendment/0
Issue Date: September 2000
USE
GAL
DEVICES
FOR
NEW
DESIGNS
PALCE16V8
COM’L:H-5/7/10/15/25, Q-10/15/25 IND:H-10/15/25, Q-20/25
PALCE16V8Z
COM’L:-25
IND:-12/15/25
PALCE16V8 and PALCE16V8Z Families
EE CMOS (Zero-Power) 20-Pin Universal
Programmable Array Logic
DISTINCTIVE CHARACTERISTICS
x
Pin and function compatible with all 20-pin PAL devices
x
Electrically erasable CMOS technology provides recongurable logic and full testability
x
High-speed CMOS technology
— 5-ns propagation delay for “-5” version
— 7.5-ns propagation delay for “-7” version
x
Direct plug-in replacement for the PAL16R8 series
x
Outputs programmable as registered or combinatorial in any combination
x
Peripheral Component Interconnect (PCI) compliant
x
Programmable output polarity
x
Programmable enable/disable control
x
Preloadable output registers for testability
x
Automatic register reset on power up
x
Cost-effective 20-pin plastic DIP, PLCC, and SOIC packages
x
Extensive third-party software and programmer support
x
Fully tested for 100% programming and functional yields and high reliability
x
5-ns version utilizes a split leadframe for improved performance
GENERAL DESCRIPTION
The PALCE16V8 is an advanced PAL device built with low-power, high-speed, electrically-
erasable CMOS technology. It is functionally compatible with all 20-pin GAL devices. The
macrocells provide a universal device architecture. The PALCE16V8 will directly replace the
PAL16R8, with the exception of the PAL16C1.
The PALCE16V8Z provides zero standby power and high speed. At 30-A maximum standby
current, the PALCE16V8Z allows battery-powered operation for an extended period.
The PALCE16V8 utilizes the familiar sum-of-products (AND/OR) architecture that allows users to
implement complex logic functions easily and efciently. Multiple levels of combinatorial logic
can always be reduced to sum-of-products form, taking advantage of the very wide input gates
available in PAL devices. The equations are programmed into the device through oating-gate
cells in the AND logic array that can be erased electrically.
The xed OR array allows up to eight data product terms per output for logic functions. The
sum of these products feeds the output macrocell. Each macrocell can be programmed as
registered or combinatorial with an active-high or active-low output. The output conguration
is determined by two global bits and one local bit controlling four multiplexers in each
macrocell.
相关PDF资料 |
PDF描述 |
|---|---|
| PALCE16V8H-7PC/5 | EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic |
| PALCE16V8Z-12JI | EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic |
| PALCE16V8Z-12PI | EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic |
| PALCE16V8Q-20PI/4 | EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic |
| PALCE16V8H-25PI/4 | EE CMOS Zero-Power 20-Pin Universal Programmable Array Logic |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PALCE16V8Q-10JI | 制造商:AMD 制造商全称:Advanced Micro Devices 功能描述:EE CMOS 20-Pin Universal Programmable Array Logic |
| PALCE16V8Q-10JI4 | 制造商:AMD 制造商全称:Advanced Micro Devices 功能描述:EE CMOS 20-Pin Universal Programmable Array Logic |
| PALCE16V8Q-10JI5 | 制造商:AMD 制造商全称:Advanced Micro Devices 功能描述:EE CMOS 20-Pin Universal Programmable Array Logic |
| PALCE16V8Q-10PC | 制造商:AMD 制造商全称:Advanced Micro Devices 功能描述:EE CMOS 20-Pin Universal Programmable Array Logic |
| PALCE16V8Q-10PC/5 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Electrically-Erasable PLD |
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