- 您现在的位置：买卖IC网 > PDF目录224672 > PALCE22V10Q-15PC/5 (LATTICE SEMICONDUCTOR CORP) 24-Pin EE CMOS (Zero Power) Versatile PAL Device PDF资料下载
参数资料
| 型号： | PALCE22V10Q-15PC/5 |
| 厂商： | LATTICE SEMICONDUCTOR CORP |
| 元件分类： | PLD |
| 英文描述： | 24-Pin EE CMOS (Zero Power) Versatile PAL Device |
| 中文描述： | EE PLD, 15 ns, PDIP24 |
| 封装： | 0.300 INCH, SKINNY, PLASTIC, DIP-24 |
| 文件页数： | 29/34页 |
| 文件大小： | 691K |
| 代理商： | PALCE22V10Q-15PC/5 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页当前第29页第30页第31页第32页第33页第34页
4
PALCE22V10 and PALCE22V10Z Families
Programmable Three-State Outputs
Each output has a three-state output buffer with three-state control. A product term controls the
buffer, allowing enable and disable to be a function of any product of device inputs or output
feedback. The combinatorial output provides a bi-directional I/O pin, and may be congured as
a dedicated input if the buffer is always disabled.
Programmable Output Polarity
The polarity of each macrocell output can be active high or active low, either to match output
signal needs or to reduce product terms. Programmable polarity allows Boolean expressions to be
written in their most compact form (true or inverted), and the output can still be of the desired
polarity. It can also save “DeMorganizing” efforts.
Selection is controlled by programmable bit S0 in the output macrocell, and affects both registered
and combinatorial outputs. Selection is automatic, based on the design specication and pin
denitions. If the pin denition and output equation have the same polarity, the output is
programmed to be active high (S0 = 1).
Preset/Reset
For initialization, the PALCE22V10 has preset and reset product terms. These terms are connected
to all registered outputs. When the synchronous preset (SP) product term is asserted high, the
output registers will be loaded with a HIGH on the next LOW-to-HIGH clock transition. When the
asynchronous reset (AR) product term is asserted high, the output registers will be immediately
loaded with a LOW independent of the clock.
Figure 2. Macrocell Conguration Options
DQ
CLK
SP
AR
a. Registered/active low
S0 = 0
S1 = 0
b. Combinatorial/active low
S0 = 0
S1 = 1
DQ
CLK
SP
AR
c. Registered/active high
S0 = 1
S1 = 0
d. Combinatorial/active high
S0 = 1
S1 = 1
16564E-005
Q
相关PDF资料 |
PDF描述 |
|---|---|
| PALCE22V10Q-25JC/4 | 24-Pin EE CMOS (Zero Power) Versatile PAL Device |
| PALCE22V10Q-25PC/4 | 24-Pin EE CMOS (Zero Power) Versatile PAL Device |
| PALCE22V10Z-25JC | Hook-Up Wire; Conductor Size AWG:18; No. Strands x Strand Size:19 x 30; Jacket Color:Brown; Approval Bodies:UL; Approval Categories:UL AWM Style 1180; Passes VW-1 Flame Test; Cable/Wire MIL SPEC:MIL-W-16878/5 Type EE RoHS Compliant: Yes |
| PALCE22V10Z-25JI | Hook-Up Wire; Conductor Size AWG:18; No. Strands x Strand Size:19 x 30; Jacket Color:Brown; Approval Bodies:UL; Approval Categories:UL AWM Style 1180; Passes VW-1 Flame Test; Cable/Wire MIL SPEC:MIL-W-16878/5 Type EE RoHS Compliant: Yes |
| PALCE22V10Z-25PC | Hook-Up Wire; Conductor Size AWG:18; No. Strands x Strand Size:19 x 30; Jacket Color:Red; Approval Bodies:UL; Approval Categories:UL AWM Style 1180; Passes VW-1 Flame Test; Cable/Wire MIL SPEC:MIL-W-16878/5 Type EE RoHS Compliant: Yes |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PALCE22V10Q-25DC | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Electrically-Erasable PLD |
| PALCE22V10Q25DC/4 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:ASIC |
| PALCE22V10Q-25JC | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Electrically-Erasable PLD |
| PALCE22V10Q-25JC/4 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述:Simple E2PLD, Programmable Array Logic, 28 Pin, Plastic, PLCC 制造商:Lattice Semiconductor Corporation 功能描述:Simple E2PLD, Programmable Array Logic, 28 Pin, Plastic, PLCC |
| PALCE22V10Q-25PC | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Electrically-Erasable PLD |
发布紧急采购，3分钟左右您将得到回复。