参数资料
型号: PBL386212SOT
厂商: ERICSSON
英文描述: Subscriber Line Interface Circuit
中文描述: 用户线接口电路
文件页数: 14/16页
文件大小: 130K
代理商: PBL386212SOT
PBL 386 21/2
14
Overvoltage Protection
The PBL 386 21/2 SLIC must be protected
against overvoltages on the telephone line
caused by lightning, ac power contact and
induction. Refer to Maximum Ratings, TIPX
and RINGX terminals, for maximum
allowable continuous and transient currents
that may be applied to the SLIC.
Secondary Protection
The circuit shown in figure 11 utilizes series
resistors together with a programmable
overvoltage protector (e.g Power
Innovations TISPPBL2), serving as a
secondary protection.
The TISPPBL2 is a dual forward-conduc-
ting buffered p-gate overvoltage protector.
The protector gate references the protection
(clamping) voltage to negative supply
voltage (i.e the battery voltage,V
B
).
As the protection voltage will track the
negative supply voltage the overvoltage
stress on the SLIC is minimized.
Positive overvoltages are clamped to gro-
und by a diode. Negative overvoltages are
initially clamped close to the SLIC negative
supply rail voltage and the protector will
crowbar into a low voltage on-state
condition, by firing an internal thyristor.
A gate decoupling capacitor, C
, is needed
to carry enough charge to supply a high
enough current to quickly turn on the
thyristor in the protector. C
shall be placed
close to the overvoltage protection device.
Without the capacitor even the low
inductance in the track to the V
supply will
limit the current and delay the activation of
the thyristor clamp.
The fuse resistors R
serve the dual
purposes of being non- destructive energy
dissipators, when transients are clamped
and of being fuses, when the line is exposed
to a power cross.
If a PTC is choosen for R
, note that it is
important to always use PTC′s in series
with resistors not sensitive to temperature,
as the PTC will act as a capacitance for fast
transients and therefore will not protect the
SLIC.
RESISTORS
(Values according to IEC E96 series):
R
SG
= 0
1% 1/10 W
R
LD
= 49.9 k
1% 1/10 W
R
OV
= User programmable
R
LC
= 38.3 k
1% 1/10 W
R
REF
= 49.9 k
1% 1/10 W
R
R
= 64.9 k
1% 1/10 W
R
T
= 105 k
1% 1/10 W
R
TX
= 24.9 k
1% 1/10 W
R
B
= 22.1 k
1% 1/10 W
R
RX
= 52.3 k
1% 1/10 W
R
FB
Depending on CODEC/filter
R
1
= 604 k
1% 1/10 W
R
2
= 604 k
1% 1/10 W
R
3
= 249 k
1% 1/10 W
R
4
= 280 k
1% 1/10 W
R
RT
= 330
5% 2 W
R
1% 1/10 W (Note 1)
R
F1
, R
F2
= Line resistor, 40
1%
P1
, R
P2
10
CAPACITORS
(Values according to IEC E96 series):
C
VB
= 100 nF
C
VB2
= 150 nF
C
VCC
= 100 nF
C
TC
= 2.2 nF
C
RC
= 2.2 nF
C
HP
= 47 nF
C
LP
= 150 nF
C
TX
= 100 nF
C
GG
= 220 nF
C
1
= 330 nF
C
2
= 330 nF
DIODES
:
D
VB
= 1N4448
D
VB2
= 1N4448
D
BB
= 1N4448
D
HP
= 1N4448 (Note 2)
100 V 10%
100 V 10%
10 V 10%
100 V 10%
100 V 10%
100 V 10%
100 V 10%
10 V 10%
100 V 10%
63 V 10%
63 V 10%
OVP:
Secondary protection (e. g. Power Innovations
TISPPBL2). The ground terminals of the
secondary protection should be connected to the
common ground on the Printed Board Assembly
with a track as short and wide as possible,
preferable a groundplane.
Figure 11. single-channel subscriber line interface with PBL 386 21/2 and combination CODEC/filter.
NOTES:
1 R
P1
and R
P2
may be omitted if D
VB
is in place
R
LC
R
RX
R
REF
R
LD
C
VCC
C
TX
PBL 386 21/2
R
TX
0
0
CODEC/
Filter
R
FB
SYSTEM CONTROL
INTERFACE
R
R
R
T
R
B
-
+
VCC
VCC
BGND
TIPX
VBAT
VBAT2
PLC
POV
PLD
VCC
PSG
NC
LP
DT
NC
DET
C1
C2
RRLY
HP
NC
RINGX
AGND
RSN
NC
REF
PTG
VTX
DR
C3
PBL 386 21/2
R
OV
R
SG
C
LP
C
1
R
4
C
2
R
3
C
HP
VB2
SLIC No. 2 etc.
C
RC
R
P2
R
P1
R
F2
R
F1
TIP
RING
OVP
C
GG
C
TC
VB
+12 V /+5V
K
R
C
VB
D
VB2
C
VB2
D
BB
VB
D
VB
R
RT
E
RG
R
2
R
1
D
HP
2 It is required to connect D
HP
between terminal HP
and ground if C
HP
> 47 nF
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