参数资料
型号: PBL386652
厂商: ERICSSON
英文描述: Subscriber Line Interface Circuit
中文描述: 用户线接口电路
文件页数: 15/18页
文件大小: 184K
代理商: PBL386652
PBL 386 65/2
15
Preliminary
ined by a software routine to determine the
duty cycle. Off-hook condition is indicated
when the DET output is at logic level low for
more than half the time.
Line Voltage Detector
The line voltage is presented on the detec-
tor output as a pulse train (see figure 15)
with a frequency inversely proportional to
the voltage according to the equation:
6
freq = 10
TR
| [Hz]
The line voltage measurement will be
started when entering this state from any
other state.
Detector Output (DET)
The PBL 386 65/2 SLIC incorporates a
detector output driver designed as open
collector (npn) with a current sinking capa-
bility of min 3 mA, and a 5 k
pull-up
resistor. The emitter of the drive transistor
is connected to AGND. A LED can be
connected in series with a resistor (
1 k
)
at the DET output to visualize, for example
loop status.
Relay driver
The PBL 386 65/2 SLIC incorporates a ring
relay driver designed as open collector
(npn) with a current sinking capability of 50
mA.The emitter of the drive transistor is
connected to BGND. The relay driver has
an internal zener diode clamp to protect the
SLIC from inductive kick-back voltages. No
external clamp is needed.
Control Inputs
The PBL 386 65/2 SLIC has three digital
control inputs, C1, C2 and C3.
A decoder in the SLIC interprets the con-
trol input condition and sets up the com-
manded operating state.
C1 to C3 are internal pull-up inputs.
Open Circuit State
In the Open Circuit State the TIPX and
RINGX line drive amplifiers as well as other
circuit blocks are powered down. This caus-
es the SLIC to present a high impedance to
the line. Power dissipation is at a minimum
and no detectors are active.
DET, to a logic low level when selected.
The loop current detector threshold value,
I
, where the loop current detector chang-
es state, is programmable with the R
LD
resistor. R
connects between pin PLD
and ground and is calculated according to:
R
LD
= 500
I
LTh
The current detector is internally filtered
and is not influenced by the ac signal at the
two wire side.
Ground Key Detector
The ground key detector indicates when
the ground key is pressed (active) by putting
the output pin DET to a logic high level
when selected. The ground key detector
circuit senses the difference between TIPX
and RINGX currents. The detector is trig-
gered when the difference exceeds the
current threshold.
Ring Trip Detector
Ring trip detection is accomplished by con-
necting an external network to a compara-
tor in the SLIC with inputs DT and DR. The
ringing source can be balanced or unbal-
anced e g superimposed on the battery
voltage or ground. The unbalanced ringing
source may be applied to either the ring
lead or the tip lead with return via the other
wire. A ring relay driven by the SLIC ring
relay driver connects the ringing source to
tip and ring.
Figure 14. Line voltage Measurement
The ring trip function is based on a polar-
ity change at the comparator input when
the line goes off-hook. In the on-hook state
no dc current flows through the loop and
the voltage at comparator input DT is more
positive than the voltage at input DR. When
the line goes off-hook, while the ring relay
is energized, dc current flows and the com-
parator input voltage reverses polarity.
Figure 13 gives an example of a ring trip
detection network. This network is applica-
ble, when the ring voltage superimposed
on the battery voltage is injected on the ring
lead of the two-wire port. The dc voltage
across sense resistor R
is monitored by
the ring trip comparator input DT and DR
via the filter network R
, R
, R
, R
, C
and
C
. DT is more positive than DR, with the
line on-hook (no dc current). The DET
output will report logic level high, i.e. the
detector is not tripped. When the line goes
off-hook, while ringing, a dc current will flow
through the loop including sense resistor
R
and will cause the input DT to become
more negative than input DR. This chang-
es the output on the DET pin to logic level
low, i.e. tripped detector condition. The
system controller (or line card processor)
responds by de-energizing the ring relay
via the SLIC, i.e. ring trip.
Complete filtering of the 20 Hz ac compo-
nent at terminals DT and DR is not neces-
sary. A toggling DET output can be exam-
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