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参数资料
| 型号： | PC1502802-4800 |
| 元件分类： | 电源模块 |
| 英文描述： | 1-OUTPUT 56 W DC-DC REG PWR SUPPLY MODULE |
| 封装： | HERMETIC SEALED PACKAGE-10 |
| 文件页数： | 1/3页 |
| 文件大小： | 247K |
| 代理商： | PC1502802-4800 |
2006 TELEDYNE MICROELECTRONICS
310.574.2082 www.teledynemicro.com
SSPC Page 1
2DSPC15028XX Rev A
Series 28 Vdc PC150
2-25A, 28 Vdc
DC Solid-State Power Controller
MICROELECTRONICS
PArt Number
DeSCriPtioN
PC1502825-4800
25A, 28 Vdc Solid-State Power Controller
PC1502815-4800
15A, 28 Vdc Solid-State Power Controller
PC1502807-4800
7A, 28 Vdc Solid-State Power Controller
PC1502802-4800
2A, 28 Vdc Solid-State Power Controller
These solid-state power controllers (SSPC) switch, monitor, report status and provide
circuit protection for circuits from 2 to 25 amps within the voltage limits and conditions
specified in MIL-STD-1275.
CoNtroL iNPut
The device is controlled ON, OFF or RESET by a TTL level applied
to the CONTROL pin (see Table 2).
VbiAS iNPut
The VBias input shall provide the voltage to give correct status
outputs in the absence of Line power (+28V). At power up (+28V
present, VBias not present), the output of the SSPC shall be OFF
regardless of the state of the Control pin. When VBias comes up,
the output of the SSPC shall follow the state of the Control pin, see
Table 4. If VBias (+5VDC) is removed while the device is operating
(+28 VDC present), the device shall remain in the last operational
state. If the device was ON, it shall remain ON. If the device was
OFF, it shall remain OFF and not be able to be commanded ON. If
an overload occurs, the device shall TRIP as normal.
LoAD St outPut
A TTL high at the LOAD pin indicates that the current flow is less
than 15% (<15%) of the rated device current. A TTL LOW indicates
that the current flow is greater than 5% (>5%) of the rated device
current. For load current between 5% and 15% of the rated current,
the LOAD status is undetermined and it may go either way.
GAte St outPut
A TTL HIGH at the GATE pin (pin 3) indicates that the voltage
on the gate of the power FET is HIGH. A TTL LOW indicates the
voltage at the gate of the power FET is LOW.
triP CHArACteriStiCS
The device shall interrupt the flow of load current when the current
draw is equal to or is greater than 145% (=>145%) of the rated
current. The device will NEVER trip when the current draw is equal
to or less than 110% (=<110%) of the rated load. Between 110%
and 145% of current draw rating, the device may or may not trip.
The trip time is specified in Figure 4.
PoWer oN CoNDitioN
When the CONTROL input is LOW or OPEN, the device shall be
OFF when power is applied to the LINE input pin.
StAtuS CoNDitioNS
The status and control of the device shall be monitored through the
CONTROL, GATE and LOAD outputs as shown in Table 4.
FuNCtioNAL SPeCiFiCAtioNS
2.74 (69.6)
TOP VIEW
SIDE VIEW
.200
(5.1)
TYP
.062
(1.6)
DIA
.040
(1.0)
.240
(6.1)
.065 (1.6)
.370
(9.4)
MAX
DIA
.110
(2.8)
1.025
(26.0)
.270
(6.9)
1.34
(34.0)
.800 (20.3)
4PLS
0.595
(15.1)
0.230 (5.8)
0.105 (2.7)
2.280 (57.9)
0.470 (11.9)
0.118 DIA
4 PLACES
2.525 (64.1)
1.550 (39.4)
NOTES:
Measurements in inches (mm)
WEIGHT – 2.3 oz. (65g)
PINS – Pins are gold-plated per
MIL-G-45204, Type III, Grade A,
Class 1.
FINISH – The package is
nickel-plated, Class 1, Grade F,
per Spec. AMS-QQ-N-290.
FiGure 1 – meCHANiCAL outLiNe
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