参数资料
型号: PC33880DW
厂商: MOTOROLA INC
元件分类: 运动控制电子
英文描述: BRUSH DC MOTOR CONTROLLER, 2 A, PDSO28
封装: PLASTIC, SOIC-28
文件页数: 6/24页
文件大小: 362K
代理商: PC33880DW
33880
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
14
SYSTEM APPLICATION INFORMATION
CIRCUIT DESCRIPTION
Introduction
The 33880 is an eight-output hardware configurable power
switch with 8-bit serial control. The 33880 incorporates
SMARTMOS
5 technology with CMOS logic, bipolar/MOS
analog circuitry, and independent double diffused DMOS power
output transistors. Many benefits are realized as a direct result
of using this mixed technology. A simplified block diagram of the
33880 is shown in Figure 1.
The 33880 device uses high efficiency updrain power DMOS
output transistors exhibiting low drain to source ON resistance
values (RDS(on) <= 0.55
at 25°C) and dense CMOS control
logic. All outputs have independent voltage clamps to provide
fast inductive turn-off and transient protection. Operational bias
currents of less than 4mA on VDD and 12 mA on VPWR with any
combination of outputs ON are a direct result of using
SMARTMOS
5 technology.
In operation, the 33880 functions as an eight-output serial
switch serving as a micro controller (MCU) bus expander and
buffer with fault management and fault reporting features. In
doing so, the device directly relieves the MCU of the fault
management functions. This device directly interfaces to an
MCU using a Serial Peripheral Interface (SPI) for control and
diagnostic readout. Figure 9 illustrates the basic SPI
configuration between an MCU and one 33880.
Figure 9. SPI Interface with Microcontroller
All inputs are compatible with 5.0 V and 3.3 V CMOS logic
levels and incorporate positive logic. Whenever an input is
programmed to a logic low state (<0.8 V) the corresponding
output will be OFF. Conversely, whenever an input is
programmed to a logic high state (>2.2 V), the output being
controlled will be ON. Diagnostics are treated in a similar
manner. Outputs with a fault will feedback (via DO) to the micro
as a logic one while normal operating outputs will provide a
logic zero.
Figure 10 illustrates the Daisy Chain configuration using the
33880. Data from the MCU is clocked daisy chain through each
device while the Chip Select (CS) bit is commanded low by the
MCU. During each clock cycle output status from the daisy
chain, the 33880 is being transferred to the MCU via the Master
In Slave Out (MISO) line. On rising edge of CS data stored in
the input register is then transferred to the output driver.
Figure 10. 33880 SPI System Daisy Chain
Multiple 33880 devices can be controlled in a parallel input
fashion using the SPI, see Figure 11. This figure illustrates
possible 24 loads being controlled by three dedicated parallel
MCU ports used for chip select.
Figure 11. Parallel Input SPI Control
Receive
Buffer
Parallel
Ports
To
Logic
33880
MC68HCxx
Micro controller
DO
DI
CS
SCLK
MISO
MOSI
Shift Register
MC68xx
Micro control-
ler
with
SPI Interface
8 Outputs
CS
MISO
MOSI
Parallel Port
SCLK
DO
DI
DO
DI
DO
DI
CS
SCLK
33880
DI
SCLK
DO
CS
Parallel
Ports
MOSI
MISO
SCLK
8Outputs
MC68xx
Micro controller
SPI
A
B
C
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