参数资料
型号: PCA24S08
厂商: NXP Semiconductors N.V.
元件分类: EEPROM
英文描述: 1024 ?8-bit CMOS EEPROM with access protection
中文描述: 1024?8位CMOS EEPROM,带有访问保护
文件页数: 12/16页
文件大小: 122K
代理商: PCA24S08
Philips Semiconductors
Product data
PCA24S08
1024
×
8-bit CMOS EEPROM with access protection
2004 May 10
12
AC SPECIFICATIONS
C
L
= 1 TTL gate and 100 pF, except as noted. V
DD
= 2.5 V to 3.6 V.
SYMBOL
PARAMETER
STANDARD MODE
I
2
C-bus
MIN
0
FAST MODE
I
2
C-bus
MIN
0
UNITS
MAX
100
MAX
400
f
SCL
t
BUF
t
HD;STA
t
SU;STA
t
SU;STO
t
HD;DAT
t
VD;ACK
t
VD;DAT
(L)
t
VD;DAT
(H)
t
SU;DAT
t
LOW
t
HIGH
t
F
t
R
t
SP
Operating frequency
kHz
μ
s
μ
s
μ
s
μ
s
ns
Bus free time between STOP and START conditions
4.7
1.3
Hold time after (repeated) START condition
4.0
0.6
Repeated START condition setup time
4.7
0.6
Setup time for STOP condition
4.0
0.6
Data in hold time
Valid time for ACK condition
2
Data out valid time
3
Data out valid time
3
0
0
600
600
ns
600
600
ns
1500
600
ns
Data setup time
250
100
ns
μ
s
μ
s
ns
Clock LOW period
4.7
1.3
Clock HIGH period
4.0
0.6
Clock/Data fall time
300
20 + 0.1 C
b1
20 + 0.1 C
b1
300
Clock/Data rise time
1000
300
ns
Pulse width of spikes that must be suppressed by the input filters
50
50
ns
NOTES:
1. C
b
= total capacitance of one bus line in pF.
2. t
VD;ACK
= time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
3. t
VD;DAT
= minimum time for SDA data out to be valid following SCL LOW.
EEPROM MEMORY
NAME
PARAMETER
MIN
TYP
MAX
UNIT
Retention
Data retention at operating temperature
10
Years
Endurance
Per byte
100,000
Cycles
t
SP
t
BUF
t
HD;STA
P
P
S
t
LOW
t
R
t
HD;DAT
t
F
t
HIGH
t
SU;DAT
t
SU;STA
Sr
t
HD;STA
t
SU;STO
SDA
SCL
SU00645
Figure 10. Timing diagram for serial interface AC specifications
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