参数资料
| 型号： | PCA8576CH/Q900,157 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 16/54页 |
| 文件大小： | 0K |
| 描述： | IC LCD DRIVER UNIV 64LQFP |
| 产品培训模块： | I²C Bus Fundamentals |
| 标准包装： | 800 |
| 显示器类型： | LCD |
| 配置： | 40 段 |
| 接口： | I²C |
| 电流 - 电源： | 120µA |
| 电源电压： | 2 V ~ 6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 托盘 |
| 其它名称： | 568-5218 |
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NXP Semiconductors
PCA8576C
Automotive LCD driver for low multiplex rates
7.5 Oscillator
The internal logic and the LCD drive signals of the PCA8576C are timed by the frequency
f clk , which equals either the built-in oscillator frequency f osc or the external clock frequency
f clk(ext) .
The clock frequency (f clk ) determines the LCD frame frequency (f fr ) and the maximum rate
for data reception from the I 2 C-bus. To allow I 2 C-bus transmissions at their maximum data
rate of 100 kHz, f clk should be chosen to be above 125 kHz.
7.5.1 Internal clock
The internal oscillator is enabled by connecting pin OSC to pin V SS . In this case, the
output from pin CLK is the clock signal for any cascaded PCA8576C in the system.
7.5.2 External clock
Connecting pin OSC to V DD enables an external clock source. Pin CLK then becomes the
external clock input.
Remark: A clock signal must always be supplied to the device. Removing the clock,
freezes the LCD in a DC state, which is not suitable for the liquid crystal.
7.6 Timing
The timing of the PCA8576C sequences the internal data flow of the device. This includes
the transfer of display data from the display RAM to the display segment outputs. In
cascaded applications, the synchronization signal (SYNC) maintains the correct timing
relationship between the PCA8576Cs in the system. The timing also generates the LCD
frame frequency which is derived as an integer division of the clock frequency (see
internal clock is used or by the frequency applied to the pin CLK when an external clock is
used.
Table 7.
LCD frame frequencies [1]
f fr = -------------
f fr = ----------
PCA8576C mode
Normal-power mode
Power-saving mode
Frame frequency
f clk
2880
f clk
480
Nominal frame frequency (Hz)
69 [2]
65 [3]
[1]
[2]
[3]
For f clk = 200 kHz.
For f clk = 31 kHz.
The ratio between the clock frequency and the LCD frame frequency depends on the
power mode in which the device is operating. In the power-saving mode the reduction
ratio is six times smaller; this allows the clock frequency to be reduced by a factor of six.
The reduced clock frequency results in a significant reduction in power consumption.
PCA8576C
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 16 December 2013
? NXP B.V. 2013. All rights reserved.
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相关代理商/技术参数 |
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|---|---|
| PCA8576D | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Automotive 40 x 4 LCD segment driver for low multiplex rates up to 1:4 |
| PCA8576DU | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Automotive 40 x 4 LCD segment driver for low multiplex rates up to 1:4 |
| PCA8576DU/2DA/Q2,0 | 功能描述:IC LCD DRIVER AUTO 40X4 UNCASED RoHS:是 类别:未定义的类别 >> 其它 系列:* 标准包装:1 系列:* 其它名称:MS305720A |
| PCA8576Q2 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Automotive 40 x 4 LCD segment driver for low multiplex rates up to 1:4 |
| PCA8581 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:128 x 8-bit EEPROM with I2C-bus interface |
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