参数资料
型号: PCF85162T/1,118
厂商: NXP Semiconductors
文件页数: 23/56页
文件大小: 0K
描述: IC LCD DISPLAY DVR 32SEG 48TSSOP
产品培训模块: I²C Bus Fundamentals
标准包装: 1
显示器类型: LCD
配置: 32 段
接口: I²C
数字或字符: 任何数字类型
电流 - 电源: 8µA
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-TFSOP(0.240",6.10mm 宽)
供应商设备封装: 48-TSSOP
包装: 标准包装
产品目录页面: 844 (CN2011-ZH PDF)
其它名称: 568-1059-6
568-1059-6-ND
568-5059-6
NXP Semiconductors
PCF85162
Universal LCD driver for low multiplex rates
7.6.1 Data pointer
The addressing mechanism for the display RAM is realized using the data pointer. This
allows the loading of an individual display data byte, or a series of display data bytes, into
any location of the display RAM. The sequence commences with the initialization of the
data pointer by the load-data-pointer command (see Table 8 ). Following this command, an
arriving data byte is stored at the display RAM address indicated by the data pointer. The
filling order is shown in Figure 12 .
After each byte is stored, the content of the data pointer is automatically incremented by a
value dependent on the selected LCD drive mode:
?
?
?
?
In static drive mode by eight
In 1:2 multiplex drive mode by four
In 1:3 multiplex drive mode by three
In 1:4 multiplex drive mode by two
If an I 2 C-bus data access terminates early then the state of the data pointer is unknown.
Consequently, the data pointer must be rewritten prior to further RAM accesses.
7.6.2 Subaddress counter
The storage of display data is determined by the contents of the subaddress counter.
Storage is allowed only when the content of the subaddress counter match with the
hardware subaddress applied to A0, A1, and A2. The subaddress counter value is defined
by the device-select command (see Table 9 ). If the content of the subaddress counter and
the hardware subaddress do not match then data storage is inhibited but the data pointer
is incremented as if data storage had taken place. The subaddress counter is also
incremented when the data pointer overflows.
7.6.3 RAM addressing in cascaded applications
In cascaded applications each PCF85162 in the cascade must be addressed separately.
Initially, the first PCF85162 is selected by sending the device-select command matching
the first device's hardware subaddress. Then the data pointer is set to the preferred
display RAM address by sending the load-data-pointer command.
Once the display RAM of the first PCF85162 has been written, the second PCF85162 is
selected by sending the device-select command again. This time however the command
matches the second device's hardware subaddress. Next the load-data-pointer command
is sent to select the preferred display RAM address of the second PCF85162.
This last step is very important because during writing data to the first PCF85162, the data
pointer of the second PCF85162 is incremented. In addition, the hardware subaddress
should not be changed whilst the device is being accessed on the I 2 C-bus interface.
PCF85162
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 5 September 2012
? NXP B.V. 2012. All rights reserved.
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