参数资料
型号: PCF8536BT/1,118
厂商: NXP Semiconductors
文件页数: 17/74页
文件大小: 0K
描述: IC LCD DRIVER LOW MPLEX 56TSSOP
特色产品: NXP - I2C Interface
标准包装: 1
显示器类型: LED,LCD
配置: 7段 + DP,14段 + DP + AP,点阵
接口: SPI 3 线串行
数字或字符: 20 字符,40 字符,320 元件
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 56-TFSOP(0.240",6.10mm 宽)
供应商设备封装: 56-TSSOP
包装: 标准包装
其它名称: 568-8446-6
NXP Semiconductors
PCF8536
Universal LCD low multiplex driver with 6 channel PWM generator
When EFR is set to 230 kHz, then the LCD frame frequency is calculated with Equation 2 :
f fr ? LCD ? = ----------------- ?
f clk ? ext
48 ? q
where q is the frequency divide factor (see Table 21 ).
Remark: f clk(ext) is the external input clock frequency to pin OSCCLK.
When the internal oscillator is used, the intermediate frequency may be output on the
OSCCLK pin. Its frequency is given in Table 21 .
(2)
Table 21.
Frame frequency prescaler values for 230 kHz clock operation
FD[4:0]
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110 [2]
01111
10000
10001
10010
10011
10100
10101
10110
10111 to 11111
Nominal LCD frame
frequency (Hz) [1]
59.9
70.5
79.9
90.4
99.8
108.9
119.8
129.5
140.9
149.7
159.7
171.1
177.5
191.7
199.7
208.3
217.8
228.3
239.6
252.2
266.2
281.9
299.5
not used
Divide factor, q
80
68
60
53
48
44
40
37
34
32
30
28
27
25
24
23
22
21
20
19
18
17
16
Intermediate clock
frequency (Hz)
2875
3382
3833
4340
4792
5227
5750
6216
6765
7188
7667
8214
8519
9200
9583
10000
10455
10952
11500
12105
12778
13529
14375
[1]
[2]
Nominal frame frequency calculated for the default clock frequency of 230 kHz.
Default value.
PCF8536
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 21 February 2012
? NXP B.V. 2012. All rights reserved.
17 of 74
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