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参数资料
| 型号： | PCF8575CTS/1,112 |
| 厂商： | NXP Semiconductors |
| 文件页数： | 3/24页 |
| 文件大小： | 0K |
| 描述： | IC I/O EXPANDER I2C 16B 24SSOP |
| 产品培训模块： | I²C Bus Fundamentals |
| 特色产品： | NXP - I2C Interface |
| 标准包装： | 59 |
| 接口： | I²C |
| 输入/输出数： | 16 |
| 中断输出： | 是 |
| 频率 - 时钟： | 400kHz |
| 电源电压： | 4.5 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 24-SSOP |
| 包装： | 管件 |
| 包括： | POR |
| 产品目录页面： | 827 (CN2011-ZH PDF) |
| 其它名称： | 568-3528-5 935278677112 PCF8575CTSDB |
1999 Aug 05
11
Philips Semiconductors
Product specication
Remote 16-bit I/O expander for I2C-bus
PCF8575C
7
CHARACTERISTICS OF THE I2C-BUS
The I2C-bus is for bidirectional, 2-line communication
between different ICs or modules. The two lines are a
serial data line (SDA) and a serial clock line (SCL). Both
lines must be connected to a positive supply via a pull-up
resistor when connected to the output stages of a device.
Data transfer may be initiated only when the bus is not
busy.
7.1
Bit transfer
One data bit is transferred during each clock pulse. The
data on the SDA line must remain stable during the HIGH
period of the clock pulse as changes in the data line at this
time will be interpreted as control signals (see Fig.9).
7.2
START and STOP conditions
Both data and clock lines remain HIGH when the bus is not
busy. A HIGH-to-LOW transition of the data line, while the
clock is HIGH is defined as the START condition (S).
A LOW-to-HIGH transition of the data line while the clock
is HIGH is defined as the STOP condition P (see Fig.10).
7.3
System conguration
A device generating a message is a ‘transmitter’, a device
receiving the message is the ‘receiver’. The device that
controls the message is the ‘master’ and the devices which
are controlled by the master are the ‘slaves’ (see Fig.11).
7.4
Acknowledge
The number of data bytes transferred between the START
and the STOP conditions from transmitter to receiver is not
limited. Each byte of eight bits is followed by one
acknowledge bit. The transmitter must release the SDA
line before the receiver can send an acknowledge bit.
A slave receiver which is addressed must generate an
acknowledge after the reception of each byte. Also a
master must generate an acknowledge after the reception
of each byte that has been clocked out of the slave
transmitter. The device that acknowledges has to pull
down the SDA line during the acknowledge clock pulse, so
that the SDA line is stable LOW during the HIGH period of
the acknowledge related clock pulse, set-up and hold
times must be taken into account.
A master receiver must signal an end of data to the
transmitter by not generating an acknowledge after the
last byte that has been clocked out of the slave. This is
done by the master receiver by holding the SDA line HIGH.
In this event the transmitter must release the data line to
enable the master to generate a STOP condition.
handbook, full pagewidth
MBC621
data line
stable;
data valid
change
of data
allowed
SDA
SCL
Fig.9 Bit transfer.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| PCF8575CTSDB | 功能描述:接口-I/O扩展器 REMOTE I/O EXPANDER RoHS:否 制造商:NXP Semiconductors 逻辑系列: 输入/输出端数量: 最大工作频率:100 kHz 工作电源电压:1.65 V to 5.5 V 工作温度范围:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体:HVQFN-16 封装:Reel |
| PCF8575CTSDB-T | 制造商:NXP Semiconductors 功能描述:I2C GPIO Expander 5.5V 24-Pin SSOP T/R |
| PCF8575DB | 制造商:Texas Instruments 功能描述: |
| PCF8575DBQR | 功能描述:接口-I/O扩展器 Remote 16-Bit I2C & SMBus I/O Expander RoHS:否 制造商:NXP Semiconductors 逻辑系列: 输入/输出端数量: 最大工作频率:100 kHz 工作电源电压:1.65 V to 5.5 V 工作温度范围:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体:HVQFN-16 封装:Reel |
| PCF8575DBQRE4 | 功能描述:接口-I/O扩展器 Remote 16-Bit I2C & SMBus I/O Expander RoHS:否 制造商:NXP Semiconductors 逻辑系列: 输入/输出端数量: 最大工作频率:100 kHz 工作电源电压:1.65 V to 5.5 V 工作温度范围:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体:HVQFN-16 封装:Reel |
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