- 您现在的位置：买卖IC网 > PDF目录296796 > PCM1737E 24-Bit, 192kHz Sampling Enhanced Multi-Level, Delta-Sigma, Audio DIGITAL-TO-ANALOG CONVERTER PDF资料下载
参数资料
| 型号： | PCM1737E |
| 英文描述： | 24-Bit, 192kHz Sampling Enhanced Multi-Level, Delta-Sigma, Audio DIGITAL-TO-ANALOG CONVERTER |
| 中文描述： | 24位192kHz采样增强的多级，Δ-Σ，音频数字模拟转换器 |
| 文件页数： | 3/27页 |
| 文件大小： | 180K |
| 代理商： | PCM1737E |
第1页第2页当前第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页
11
PCM1737
IDX5
IDX6
R/W
IDX4
IDX2
IDX3
IDX1
IDX0
D7
D6
D5
D4
D3
D2
D5
D4
D3
D2
D1
D0
MSB
Register Index (or Address)
Read/Write Operation
0 = Write Operation
1 = Read Operation (register index is ignored)
Register Data
LSB
FIGURE 6. Control Data Word Format for MDI.
FIGURE 7. Write Operation Timing.
0
D7
D6
D5
D4
D3
D2
D15 D14
D1
D0
X
XX
IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0
ML
MC
MDI
LRCK
BCK
DATA1-DATA3
50% of V
DD
50% of V
DD
50% of V
DD
t
BCH
t
BCL
t
LB
t
BL
t
DS
t
DH
t
BCY
SYMBOL
PARAMETER
MIN
MAX
UNITS
tBCY
BCK Pulse Cycle Time
48 or 64fS(1)
tBCH
BCK High Level Time
35
ns
tBCL
BCK Low Level Time
35
ns
tBL
BCK Rising Edge to LRCK Edge
10
ns
tLB
LRCK Falling Edge to BCK Rising Edge
10
ns
tDS
DIN Set Up Time
10
ns
tDH
DIN Hold Time
10
ns
NOTE: (1) fS is the sampling frequency (e.g., 44.1kHz, 48kHz, 96kHz, etc.)
FIGURE 5. Audio Interface Timing.
REGISTER WRITE OPERATION
All Write operations for the serial control port use 16-bit
data words. Figure 6 shows the control data word format.
The most significant bit is the Read/Write (R/W) bit. When
set to ‘0’, this bit indicates a Write operation. There are
seven bits, labeled IDX[6:0], that set the register index (or
address) for the Write operation. The least significant eight
bits, D[7:0], contain the data to be written to the register
specified by IDX[6:0].
Figure 7 shows the functional timing diagram for writing the
serial control port. ML is held at a logic ‘1’ state until a
register needs to be written. To start the register write cycle,
ML is set to logic ‘0’. Sixteen clocks are then provided on
MC, corresponding to the 16 bits of the control data word on
MDI. After the sixteenth clock cycle has completed, ML is
set to logic ‘1’ to latch the data into the indexed mode control
register.
SINGLE REGISTER READ OPERATION
Read operations utilize the 16-bit control word format shown
in Figure 6. For Read operations, the Read/Write (R/W) bit
is set to ‘1’. Read operations ignore the index bits, IDX[6:0],
of the control data word. Instead, the REG[6:0] bits in
Control Register 21 are used to set the index of the register
that is to be read during the Read operation. Bits IDX[6:0]
should be set to 00H for Read operations.
相关PDF资料 |
PDF描述 |
|---|---|
| PCM3052ARTFG4 | PCM CODEC, PQCC32 |
| PCM3794RHBRG4 | SPECIALTY TELECOM CIRCUIT, PQCC32 |
| PCM3794RHBR | SPECIALTY TELECOM CIRCUIT, PQCC32 |
| PCM3794RHBTG4 | SPECIALTY TELECOM CIRCUIT, PQCC32 |
| PCM3794RHBT | SPECIALTY TELECOM CIRCUIT, PQCC32 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PCM1737E/2K | 功能描述:音频数/模转换器 IC 24-Bit 192kHz Smplg Enh Mltl D-S DAC RoHS:否 制造商:Texas Instruments 转换器数量: 分辨率:16 bit 接口类型:I2S, UBS 转换速率: 信噪比:98 dB 工作电源电压:5 V DAC 输出端数量:2 工作温度范围:- 25 C to + 85 C 电源电流:23 mA 安装风格:SMD/SMT 封装 / 箱体:TQFP-32 封装:Reel |
| PCM1737E/2KG4 | 功能描述:音频数/模转换器 IC 24-Bit 192kHz Smplg Enh Mltl D-S DAC RoHS:否 制造商:Texas Instruments 转换器数量: 分辨率:16 bit 接口类型:I2S, UBS 转换速率: 信噪比:98 dB 工作电源电压:5 V DAC 输出端数量:2 工作温度范围:- 25 C to + 85 C 电源电流:23 mA 安装风格:SMD/SMT 封装 / 箱体:TQFP-32 封装:Reel |
| PCM1737E-1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PCM1737EG4 | 功能描述:音频数/模转换器 IC 24-Bit 192kHz Smplg Enh Mltl D-S DAC RoHS:否 制造商:Texas Instruments 转换器数量: 分辨率:16 bit 接口类型:I2S, UBS 转换速率: 信噪比:98 dB 工作电源电压:5 V DAC 输出端数量:2 工作温度范围:- 25 C to + 85 C 电源电流:23 mA 安装风格:SMD/SMT 封装 / 箱体:TQFP-32 封装:Reel |
| PCM1738 | 制造商:BB 制造商全称:BB 功能描述:24-Bit, 192kHz Sampling, Advanced Segment, Audio-Stereo DIGITAL-TO-ANALOG CONVERTER |
发布紧急采购，3分钟左右您将得到回复。