参数资料
型号: PCZ33811EGR2
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO16
封装: 1.27 MM PITCH, ROHS COMPLIANT, MS-013AA, SOIC-16
文件页数: 12/18页
文件大小: 605K
代理商: PCZ33811EGR2
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
33811
PIN CONNECTIONS
PIN CONNECTIONS
Figure 3. 33811 Pin Connections
1
2
3
4
5
6
16
15
7
8
14
13
12
11
10
9
A_GND
N/C
SOLM1
SOLM2
SOLM3
SOLM4
SOLM5
VPWR
VDD
D_GND
RESET
VSPI
SO
SI
SCLK
CS
Table 1. 33811 Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page 11.
Pin Number
Pin Name
Pin Function
Formal Name
Definition
1
VDD
Power
Digital Voltage Supply The VDD pin is the digital logic supply voltage used internally in the IC.
2
D_GND
Ground
Digital Ground
Digital ground for the internal control circuits of the IC. This ground should
be used for decoupling of the VDD supply.
3
SO
Output
Serial Output Data
The SO output pin is used to transmit serial data from the device to the
MCU. The SO pin remains tri-state until selected by the active low CS.
The serial output data is available to be latched by the MCU on the rising
edge of SCLK. The SO data transitions on falling edge of the SCLK.
4
SI
Input
Serial Input Data
The SI input pin is used to receive serial data from the MCU. The serial
input data is latched on the rising edge of SCLK, and the input data
transitions on the falling edge of SCLK.
5
CS
Input
Chip Select
The Chip Select input pin is an active low signal sent by the MCU to
indicate that the device is being addressed. This input requires CMOS
logic levels and has an internal active pull-up current source.
6
SCLK
Input
Serial Clock Input
The SCLK input pin is used to clock in and out the serial data on the SI
and SO pins while being addressed by the CS. The SCLK signal consists
of a 50% duty cycle with CMOS logic levels. Input data is latched by the
device on the rising edge of SCLK while output data is changed on the
falling edge. SCLK is ignored by the device while CS is high.
7
RESET
Input
Reset Input
The RESET pin, when pulled high, clears any fault bits and causes the
Serial Output pin to be tri-stated. The RESET pin operates at the CMOS
levels dictated by the VDD line and the state of the VSPI pin.
8
VSPI
Input
VSPI
The VSPI pin determines the voltage levels for the SPI interface. It must
be connected to the same voltage supply (+5 volts or +3.3 Volts) as the
MCU’s SPI interface.
9
VPWR
Power
Analog Voltage Supply The analog voltage supply provides the power for all the input amplifiers
and other analog circuitry in the IC.
10
SOLM5
Input
Solenoid Monitor 5
The Solenoid Monitor Input is connected to the solenoid coil at the output
driver. It monitors the current waveform through the solenoid coil as it
appears as a voltage across the output driver MOSFET.
11
SOLM4
Input
Solenoid Monitor 4
The Solenoid Monitor Input is connected to the solenoid coil at the output
driver. It monitors the current waveform through the solenoid coil as it
appears as a voltage across the output driver MOSFET.
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