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参数资料
| 型号： | PCZ33937AEK/R2 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 运动控制电子 |
| 英文描述： | AC MOTOR CONTROLLER, 0.8 A, PDSO54 |
| 封装： | 4.60 X 6.30 MM, 0.65 MM PITCH, ROHS COMPLIANT, SOIC-54 |
| 文件页数： | 21/47页 |
| 文件大小： | 749K |
| 代理商： | PCZ33937AEK/R2 |
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Analog Integrated Circuit Device Data
28
Freescale Semiconductor
33937
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
INTRODUCTION
supplying external current loads. These limits are based on
maintaining the voltage at CBOOT at least 3.0V greater than
the voltage on the HS_S for that phase. If this voltage
differential becomes less than 3.0V, the corresponding high
side FET will most likely not remain fully enhanced and the
high side driver may malfunction due to insufficient bias
voltage between CBOOT and HS_S.
The slew rate of the external output FET is limited by the
driver output impedance, overall (external and internal) gate
resistance and the load capacitance. To ensure the Low Side
FET is not turned on by a large positive dV/dt on the drain of
the Low Side FET, the turn-on slew rate of the High Side
should be limited. If the slew rate of the High Side is limited
by the gate-drain capacitance of the High Side FET, then the
displacement current injected into the Low Side gate drive
output will be approximately the same value. Therefore, to
ensure the Low Side drivers can be held off, the voltage drop
across the Low Side gate driver must be lower than the
threshold voltage of the Low Side FET (see Figure 17).
Similarly, during large negative dV/dt, the High Side FET
will be able to remain off if its gate drive Low Side switch,
develops a voltage drop less than the threshold voltage of the
High Side FET. The gate drive Low Side switch discharges
the gate to the source.
Additionally, during negative dV/dt the Low Side gate drive
could be forced below ground. The Low Side FETs must not
inject detrimental substrate currents in this condition.
The occurrence of these cases depends on the polarity of
the load current during switching.
Figure 17. Positive DV/dt Transient
DRIVER FAULT PROTECTION
The 33937 IC integrates several protection mechanisms
against various faults. The first of them is the Current Sense
Amplifier with the Over-current Comparator. These two
blocks are common for all three driver phases.
Current Sense Amplifier
This amplifier is usually connected as a differential
amplifier (see Figure 9). It senses a current flowing through
the external FETs as a voltage across the current sense
resistor RSENSE. Since the amplifier common mode range
does not extend below ground, it is necessary to use an
external reference to permit measuring both positive and
negative currents.
The amplifier output can be monitored directly (e.g. by the
microcontroller’s ADC) at the AMP_OUT pin, providing the
means for closed loop control with the 33937.
The output voltage is internally compared with the Over-
current Comparator threshold voltage (see Figure 22).
Over-current Comparator
The amplified voltage across the Rsense is compared with
the pre-set threshold value by the Over-current Comparator
input. If the Current Sense Amplifier output voltage exceeds
the threshold of the Over-current Comparator it would
change the status of its output (OC_OUT pin) and the fault
The occurrence of this fault would be signalled by the
return value of the Status Register 0. If the proper Interrupt
Mask has been set, this fault condition will generate an
interrupt - the INT pin will be asserted High. The INT will be
held in the High state until the fault is removed, and the
appropriate bit in the Status Register 0 is cleared by the
CLINT0 command. This fault reporting technique is
described in detail in the Logic Commands and Registers
section.
Desaturation Detector
The Desaturation Detector is a comparator integrated into
the output driver of each phase channel. It provides an
additional means to protect against “Short-to-Ground” fault
condition when the output node gets shorted to the supply
voltage (short across the High Side FET).
Phase x
Output
Phase
Return
Px_LS_S
Px_LS_G
Px_HS_S
Low
-Side
Driver
LS
Control
Px_LS_G
Px_HS_G
Deadtime
-VD
VSUP
Phase x Output Voltage
dV/dt
CGS
CDG
CDS
Rg
iCDG
VLS
33927
+
-
G
S
D
Discrete
FET
Package
Zo
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相关代理商/技术参数 |
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| PCZ33999CEK | 制造商:Freescale Semiconductor 功能描述:16 LOW SIDE PWM&SPI - Rail/Tube |
| PD 1/2-0 | 制造商:TE Connectivity 功能描述:HEATSHRINK END CAP 12.7MM PK100 |
| PD 1/4-0 | 制造商:TE Connectivity 功能描述:HEATSHRINK END CAP 6.4MM PK100 制造商:TE Connectivity 功能描述:HEATSHRINK, END CAP, 6.4MM, PK100 制造商:TE Connectivity / Raychem 功能描述:HEATSHRINK, END CAP, 6.4MM, PK100; I.D. Supplied - Metric:6.4mm; I.D. Supplied - Imperial:0.251"; I.D. Recovered Max - Metric:2mm; I.D. Recovered Max - Imperial:0.078"; Shrink Ratio:3:1; Shrink Tubing / Boot Material:PO (Polyolefin);;RoHS Compliant: Yes |
| PD 1/8-0 | 制造商:TE Connectivity 功能描述:HEATSHRINK END CAP 3.2MM PK100 制造商:TE Connectivity 功能描述:HEATSHRINK, END CAP, 3.2MM, PK100 制造商:TE Connectivity 功能描述:HEATSHRINK, END CAP, 3.2MM, PK100, I.D. Supplied - Metric:3.2mm, I.D. Supplied - 制造商:TE Connectivity 功能描述:HEATSHRINK, END CAP, 3.2MM, PK100, I.D. Supplied - Metric:3.2mm, I.D. Supplied - Imperial:0.125", I.D. Recovered Max - Metric:0.58mm, I.D. Recovered Max - Imperial:0.022", Shrink Ratio:3:1, Shrink Tubing / Boot Material:PO , RoHS Compliant: Yes |
| PD 2436 | 制造商:Osram Opto semiconductors 功能描述:Bulk |
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