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参数资料
| 型号： | PD70101ILQ-TR |
| 厂商： | MICROSEMI CORP-ANALOG MIXED SIGNAL GROUP |
| 元件分类： | 稳压器 |
| 英文描述： | SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PQCC32 |
| 封装： | 5 X 5 MM, ROHS COMPLIANT, PLASTIC, QFN-32 |
| 文件页数： | 8/19页 |
| 文件大小： | 416K |
| 代理商： | PD70101ILQ-TR |
PD70101 & PD70201
PRELIMINARY DATA SHEET
Copyright 2010
Microsemi
Page 16
Rev. 0.6, 21-Jan-2011
Analog Mixed Signal Group
11861 Western Avenue, Garden Grove, CA 92841; 714-898-8121; Fax: 714-893-2570
P
D
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1
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&
P
D
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2
0
1
PD70101 / PD70201: IEEE 802.3 af/at
Power Over Ethernet PD Controller
TM
T H E O R Y O F O P E R A T I O N
START-UP SUPPLY
PD70101/PD70201 IC provides a 10.5V (typical)
regulated output used as a start-up supply for the
integrated DC/DC controller when VCC is provided via a
bootstrap winding. This regulated supply is available at
VCC pin, and is referenced to VPN_OUT pin. The VCC
start-up supply is current-limited at 10mA (min.).
For stability, the start-up regulator requires a minimum
of 4.7F ceramic capacitor connected directly between
VCC and PGND pins (most applications will connect
PGND to VPN_OUT).
PD INTERFACE THERMAL PROTECTION
Both PD70101 and PD70201 IC contain temperature
sensors which individually monitor both the isolation
MOSFET and the Classification Current Source for over
temperature conditions. In case of an overtemperature
condition, the sensor will activate protection circuitry
which will disconnect its respective monitored function.
BULK CAPACITOR DISCHARGE
The bulk capacitor discharge circuitry eliminates the
need to place a diode in series with the VPP line to
prevent
an
application’s
bulk
capacitance
from
discharging through the detection resistor and the
isolation switch MOSFET’s body diode.
Discharge
current through the detection resistor can cause failure of
the detection signature in cases where a PD is
connected
and
the
bulk
capacitance
is
not
fully
discharged.
During
normal
operation,
PD70101/PD70201
IC
continuously monitors voltage at VPP to VPN_IN.
Should VPP to VPN_IN voltage fall below isolation switch
turn-off threshold (31V to 34V), isolation switch MOSFET
is immediately placed in a high-impedance state. At this
point the internal logic monitors the voltage at VPP to
VPN_OUT.
If VPP to VPN_OUT voltage is between
1.5V to 32V, a 23mA (min.) constant current source is
connected across the VPP and VPN_OUT pins.
This
constant
current
source
provides
bulk
capacitor
discharge.
A 220F bulk capacitance can be discharged from
32V to 1.5V in a maximum period of 292ms.
DC-DC START-UP
The DC-DC controller starts up when it receives the
PGOOD high signal from the Front End, or ENABLE
goes high provided that VCC UVLO have passed.
When the PGOOD signal or ENABLE goes high, the
start up sequence begins with ramping up the SS pin
from GND to 1.2V.
For isolated applications the
output voltage may reach the maximum level before
the SS reaches 1.2V, depending on the output loading
condition. In applications with lighter loads, the output
reaches regulation level sooner than in heavy loads,
as in this mode the SS voltage directly controls the
peak inductor current; hence the energy is delivered
to the load.
The external secondary error amplifier
regulates the output voltage and controls the peak
inductor current via the opto-coupler across the
isolation
barrier.
For
non-isolated
applications,
because the internal error amplifier is used to close
the regulation loop, the output reaches the regulation
level when SS reaches 1.2V.
An additional internal offset is added to the FB to
ensure that COMP does not reach its upper limit
because of amplifier input offset.
This offset is
removed (slowly to avoid overshoot) when the SS
ramp is complete.
Low
Power
Mode
(refer
to Low
Power
Mode
Operation) is not supported during SS ramp as it is
not necessary.
In addition, over current and short
circuit protection functions differently during, and after
the SS process. Refer to the “Current Limit and Short
Circuit Protection” section below.
CURRENT LIMIT AND SHORT CIRCUIT PROTECTION
During SS ramping up if the current limit trips, both
PG and SG go low and stay low for 16 clock cycles.
After this time, the PG and SG try again. If the current
limit trips again, the 16 clock cycles repeats until the
SS ramp is complete.
After SS ramp is completed
(VSS ≈ 1.08V), the current limit trip will set a "four
consecutive event trip counter", with no skip in
between.
If there is a trip during four consecutive
cycles with current limit, the controller enters hiccup
mode by discharging the SS capacitor with a constant
current that equals 10% of the charging current during
ramp up.
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