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| 型号： | PE4150MLI-Z |
| 厂商： | Peregrine Semiconductor |
| 文件页数： | 4/10页 |
| 文件大小： | 0K |
| 描述： | IC MOSFET MIXER QUAD 20-QFN |
| 标准包装： | 1 |
| 系列： | UltraCMOS™ |
| RF 型： | 通用 |
| 频率： | 136MHz ~ 941MHz |
| 混频器数目： | 1 |
| 次要属性： | 升/降频器 |
| 电流 - 电源： | 8mA |
| 电源电压： | 2.9 V ~ 3.1 V |
| 包装： | 标准包装 |
| 封装/外壳： | 20-VFQFN 裸露焊盘 |
| 供应商设备封装： | 20-QFN（4x4） |
| 其它名称： | 1046-1037-6 |
PE4150
Product Specification
Evaluation Kit
The Mixer Evaluation Kit board was designed to
ease customer evaluation of the PE4150 Quad
MOSFET Mixer with integrated LO amplifier.
The RF and IF ports are connected through
50ohm transmission lines and 1:4 transmission
line transformers to J5 and J7, respectively. The
LO ports are connected through 50
transmission lines to J4 and J6, respectively, and
can support either a single-ended or differential
signal drive. With a single-ended input, no
termination is needed on the un-used port.
The board is constructed of a two metal layer FR4
with a total thickness of 0.062". The bottom layer
provides ground for the RF transmission lines.
The transmission lines were designed using a
coplanar waveguide with ground plane model
using a trace width of 0.037", trace gaps of 0.008",
dielectric thickness of 0.059" and metal thickness
of 0.0015".
J3 provides an optional external DC bias that can
be applied to the LO input, if there is DC
component to the applied RF input. To use this
option, transformers T2 and T3 must be carefully
chosen to allow the use of a non-zero common-
mode level.
J9 can be used to enable or disable the part. The
chip enable/EN is active low.
De-coupling capacitors are provided on the V DD
traces. These capacitors should be placed as
close to the DV DD pin as possible.
Figure 4. Evaluation Board Layout
Peregrine Specification 101-0201-00A
?2010 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0242-06
│ UltraCMOS? RFIC Solutions
Page 4 of 10
Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
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