参数资料
型号: PFS725EG
厂商: Power Integrations
文件页数: 17/30页
文件大小: 0K
描述: IC PFC CTLR 480W 180V ESIP
标准包装: 48
系列: HiperPFS™
模式: 连续导电(CCM)
频率 - 开关: 24kHz ~ 95kHz
电源电压: 10 V ~ 12 V
工作温度: -40°C ~ 125°C
安装类型: 通孔
封装/外壳: 7-SIP,6 引线,裸露焊盘,成形引线
供应商设备封装: eSIP-7G
包装: 管件
其它名称: 596-1388
PFS704-729EG
PCB Design Guidelines and Design Example
The line-sense network and the feedback circuit use large
resistance values in order to minimize power dissipation in the
feedback network and the line-sense network. Care should be
taken to place the feedback circuit and the line-sense network
components away from the high voltage and high current nodes
to minimize any interference. Any noise injected in the feedback
network or the line-sense network will typically manifest as
degradation of power factor. Excessive noise injection can lead
to waveform instability or dissymmetry.
The EMI filter components should be clustered together to
improve filter effectiveness. The placement of the EMI filter
components on the circuit board should be such that the input
circuit is located away from the drain node of the HiperPFS, the
output diode of the PFC or the PFC inductor.
A filter or decoupling capacitor should be placed at the output
of the bridge rectifier. This capacitor together with the
X capacitance in the EMI filter and the differential inductance of
the EMI filter section and the source impedance, works as a
filter to reduce the switching frequency current ripple in the
input current. This capacitor also helps to minimize the loop
area of the switching frequency current loop thereby reducing EMI.
PFC Output
Capacitor
The connection between the HiperPFS drain node, output
diode drain terminal and the PFC inductor should be kept as
small as possible.
A low loss ceramic dielectric capacitor should be connected
between the cathode of the PFC output diode and the source
terminal of the HiperPFS. This ensures that the loop area of the
loop carrying high frequency currents at the transition of
switch-off of the MOSFET small and helps to reduce radiated
EMI due to high frequency pulsating nature of the diode current
traversing through the loop.
During placement of components on the board, it is best to
place the VOLTAGE MONITOR pin, FEEDBACK pin and VCC
pin decoupling capacitors close to the HiperPFS before the
other components are placed and routed. Power supply return
trace from the GROUND pin should be separate from the trace
connecting the feedback circuit components to the GROUND pin.
To minimize effect of trace impedance affecting regulation,
output feedback should be taken directly from the output
capacitor positive terminal. The upper end of the line-sense
resistors should be connected to the high frequency filter
capacitor connected at the output of the bridge rectifier.
PFC
Inductor
Input
Capacitor
(C IN )
PFC
Output
HiperPFS
Second Stage
Converter
Auxiliary Supply for PFC –
from Standby Power Supply
Bridge
Rectifier
Thermistor
Shorting Relay
EMI Filter
AC Input
PI-6238-012611
Figure 19. PCB Layout Example for System Power Supply consisting of a PFC and a Second Stage Converter.
17
www.powerint.com
Rev. F 12/12
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