参数资料
型号: PFS759HG
厂商: POWER INTEGRATIONS INC
元件分类: 稳压器
英文描述: 2.94 A SWITCHING CONTROLLER, 70 kHz SWITCHING FREQ-MAX, PZIP16
封装: HALOGEN FREE AND ROHS COMPLIANT, PLASTIC, SIP-16
文件页数: 6/36页
文件大小: 4692K
代理商: PFS759HG
Rev. C 02/11
14
TFS757-764HG
www.powerint.com
Design, Assemble and Layout Considerations
Power Table
The data sheet power table (Table 1, page 1) represents the
maximum advised continuous power based on the following
conditions;
1. Typical multi-output PC main with the following outputs +12 V,
+5 V, +3.3 V, -12 V, and +5 V standby.
2. A boost regulated DC input for Main 300 VDC to 385 VDC
minimum nominal of 375 VDC.
3. HiperTFS total efficiency at least 85% at full load.
4. Schottky high-efficiency output diodes.
5. DC input for Standby 130 VDC to 385 VDC.
6. Sufficient heat sinking and fan cooling to keep device
temperature below 100 °C.
7. Transformer designed with nominal duty factor of 45%.
HiperTFS Selection
Selecting the optimum HiperTFS depends upon the continuous
output power, thermal management, (heat sinking, etc.), and
maximum ambient operating temperature. OEM applications
are typically 50 °C max ambient while clone PC supplies are
usually specified at 25 °C ambient. Higher efficiency can be
achieved with the larger devices. The maximum output power
can be tailored for any given device by programming primary
I
LIMIT(MA).
Hold-Up Time
The input capacitor is a critical component in designing for a
guaranteed minimum hold-up time. Proper design of the
transformer’s nominal duty cycle and sufficient primary winding
clamp voltage for rest of Main transformer are also essential.
PIXLS (PI Expert Design Spreadsheet) can compute these
values or refer to formula in AN-51.
Bias Support for High-Side Driver
Bias support for HiperTFS high-side switch is sourced from a
forward phased winding of the Main transformer and should
provide a minimum of 17 V at 300 VDC input (or minimum input
voltage at which regulation can be maintained) to guarantee the
12 V bias required for the high-side driver is maintained.
Primary Bias Support
The standby converter provides a minimum 17 V output that
biases the BYPASS pin of HiperTFS. It is also the source for
remote ON/OFF control and OVP. This output should be
capable of delivering a minimum of 20 mA. The primary bias
filter capacitor should be at 330 mF to hold up the bias during
the start-up transient.
Start-Up
There is a duty factor soft-start function at start-up that slews
from 30% duty factor to max duty factor in approximately 15 ms.
The current limit during start-up is actually boosted by 115% for
the first 32 ms to provide the ability to drive heavy capacitive
loads and meet less than 20 ms output rise time requirement.
Figure 14. Full Range EMI Scan (132 kHz with Jitter) With Identical Circuitry and Conditions.
Figure 15. Typical Primary Winding Clamp-to-Rail.
-20
-10
0
-10
20
30
40
50
60
70
80
0.15
1
10
30
Frequency (MHz)
Amplitude
(dB
V)
PI-2576-010600
EN55022B (QP)
EN55022B (AV)
EN55022B (QP)
EN55022B (AV)
-20
-10
0
-10
20
30
40
50
60
70
80
0.15
1
10
30
Frequency (MHz)
Amplitude
(dB
V)
PI-5856-030810
HD
HS
D
G
S
HiperTFS VDDH
R
DR1
150 V
+V
BUS
RTN
DR2
L
FB
EN
BP
DSB
PI-5846-111810
CONTROL
Figure 13. Fixed Frequency Operation Without Jitter.
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