参数资料
型号: PI2EQX4401DZFEX
厂商: Pericom
文件页数: 5/8页
文件大小: 0K
描述: IC PCI-E REPEATER/EQUALZR 36TQFN
标准包装: 3,500
系列: *
5
PS8872H
09/26/08
PI2EQX4401D
2.5Gbps x1 Lane Serial PCI-Express Repeater/Equalizer
with Clock Buffer & Signal Defect Feature
AC/DC Electrical Characteristics (VDD = 1.8 ±0.1V)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
Ps
Supply Power
EN = LVCMOS Low
0.1
W
EN = LVCMOS High
0.6
Latency
From input to output
2.0
ns
CML Receiver Input
RLRX
Return Loss
50 MHz to 1.25 GHz
12
dB
VRX-DIFFP-P
Differential Input Peak-to-
peak Voltage
0.175
1.200
V
VRX-CM-ACP
AC Peak Common Mode
Input Voltage
150
mV
VTH-
Signal Detection Threshold
EN_x=High
120
175
mV
ZRX-DIFF-DC
DC Differential Input
Impedance
80
100
120
Ω
ZRX-DC
DC Input Impedance
40
50
60
Equalization
JRS
Residual Jitter
Total Jitter (2)
0.3
Ulp-p
Deterministic jitter
0.2
JRM
Random Jitter
See note 2
1.5
psrms
Notes
1.
K28.7 pattern is applied differentially at point A as shown in Figure 1.
2.
Total jitter does not include the signal source jitter. Total jitter (TJ) = (14.1 × RJ + DJ) where RJ is random RMS jitter and DJ is maximum
deterministic jitter. Signal source is a K28.5 ± pattern (00 1111 1010 11 0000 0101) for the deterministic jitter test and K28.7 (0011111000) or
equivalent for random jitter test. Residual jitter is that which remains after equalizing media-induced losses of the environment of Figure 1 or
its equivalent. The deterministic jitter at point B must be from media-induced loss, and not from clock source modulation. JItter is measured at
0V at point C of Figure 1.
Figure 1. Test Condition Referenced in the Electrical Characteristic Table
Pericom
PI2EQX4401A
Signal
Source
SmA
Connector
In
Out
A
SmA
Connector
BC
FR4
30IN
08-0241
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