参数资料
型号: PI49FCT3802LE
厂商: Pericom Semiconductor Corp.
英文描述: 1:5/1:7 Clock Buffer for Networking Applications
中文描述: 1:5 / 1:7时钟缓冲器,用于网络应用
文件页数: 3/6页
文件大小: 296K
代理商: PI49FCT3802LE
3
PS8559A 09/14/04
PI49FCT3802/PI49FCT3803
1:5/1:7 Clock Buffers
for Networking Applications
Notes:
1.
2.
3.
For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
Typical values are at V
DD
= 3.3V, +25°C ambient.
Per TTL driven input (V
IN
= V
DD
– 0.6V); all other inputs at V
DD
or GND.
Capacitance
(
T
A
= 25°C, f = 1 MHz)
Parameters
(1)
C
IN
C
OUT
Note:
1.
This parameter is determined by device characterization but is not production tested.
Description
Test Conditions
V
IN
= 0V
V
OUT
= 0V
Typ
3.0
Max.
4
6
Units
Input Capacitance
Output Capacitance
pF
Power Supply Characteristics
Parameters
I
DDQ
Quiescent Power Supply Current
Supply Current per Inputs
@ TTL High
Description
Test Conditions
V
IN
= GND or V
DD
Min.
Typ.
(2)
0.1
Max.
30
Units
μA
V
DD
= Max.
I
DD
V
DD
= Max.
V
IN
= V
DD
-0.6V(3)
47
300
I
DD
Dynamic Supply Current
V
DD
= 3.6V,
No load
50 MHz
67 MHz
80 MHz
100 MHz
125 MHz
156 Mhz
43
56
66
81
97
121
mA
Notes:
1.
2.
3.
4.
See test circuit and waveforms.
Minimum limits are guaranteed but not tested on Propagation Delays.
Skew measured at worse cast temperature (max. temp).
Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade.
Switching Characteristics
(V
DD
= 3.3V ± 0.3V, T
A
= 85°C)
Parameters
t
R
/t
F
CLKn Rise/Fall Time 0.8V ~ 2.0V
t
PLH
t
PHL
Skew between two outputs of the same package (same
transition)
Skew between opposite transitions (t
PHL
- t
PLH
) of the same
output
t
sk(t)(3)
Skew between two outputs of different packages
(4)
Desciription
Test Conditions
Min.
Typ.
0.7
Max.
1.0
Units
C
L
= 15pF,
125 Mhz
ns
Propagation Delay BUF_IN to CLKn
1.0
2.2
2.5
t
sk(o)(3)
110
250
ps
t
sk(p)(3)
200
250
0.55
ns
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