参数资料
型号: PI6C103-xxL
厂商: Pericom Semiconductor Corp.
英文描述: Precision Clock Synthesizer
中文描述: 精密时钟合成器
文件页数: 1/12页
文件大小: 568K
代理商: PI6C103-XXL
222
PS8315-2 04/08/99
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PI6C103
for Mobile PCs
PCICLK_F
PCICLK1
XTAL_OUT
PCICLK2
PCICLK3
V
SS
V
DD
PCICLK4
PCICLK5
V
DD
48 MHz
48-24MHz/TS#
V
DD
REF0/Spread#
V
DD
2
CPUCLK1
V
SS
2
V
SS
PCI_STOP#
V
DD
CPU_STOP#
PWR_DWN#
SEL100/66#
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
SS
XTAL_IN
CPUCLK0
REF1/SEL48#
Pin Configuration
Block Diagram
Description
The PI6C103 is a high-speed, low-noise clock generator designed
to work with the PI6C18X clock buffer to meet all clock needs
for Mobile Intel Architecture platforms. System clock frequencies
of 66.6 MHz and 100 MHz are supported.
Split supplies of 3.3V and 2.5V are used. The 3.3V power supply
powers everything except the CPU clock. The 2.5V power supply is
used to power the CPUCLK outputs. 2.5V signaling follows JEDEC
standard 8-X. Power sequencing of the 3.3V and 2.5V supplies is
not required.
An asynchronous PWR_DWN# signal may be used to orderly
power down (or up) the system. CPU and PCI clocks may also be
stopped by the CPU_STOP# and PCI_STOP# signals.
The PI6C103 contains the Spread Spectrum function for only those
clocks that synchronize to the CPU clocks (CPU and PCI clocks).
28-Pin
H, L
Features
Two copies of CPU clock
100 MHz or 66.6 MHz operation
Six copies of PCI clock, (synchronous with CPU clock)
Two copies of REF clock @ 14.31818 MHz
One copy of 48 MHz
One copy of selectable 48/24 MHz
Power management control input pins
Isolated core V
DD
, V
SS
pins for noise reduction
28-pin SSOP (H) and TSSOP (L) packages
SSC Options:
Device
PI6C103
PI6C103-05
PI6C103-06
REF
[0:1]
PCICLK
[1:5]
CPUCLK
[0:1]
REF
OSC
CPU_STOP#
2
2
5
PCICLK_F
48 MHz
48/24 MHz
PCI_STOP#
DIV
÷2
PLL1
XTAL_OUT
XTAL_IN
SEL100/66#
SEL48#
SPREAD#
PWR_DWN#
MUX
PLL2
TS#
66 MHz
0.67%
1.35%
1.79%
100 MHz
0.65%
1.35%
1.79%
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