参数资料
型号: PI6C10806
厂商: Pericom Semiconductor Corp.
英文描述: 1.8V/2.5V, 250MHz, Low Skew 1:6 Crystal to LVCMOS Clock Buffer
中文描述: 1.8V/2.5V,250MHz的,低偏移1:6水晶来的LVCMOS时钟缓冲器
文件页数: 3/7页
文件大小: 446K
代理商: PI6C10806
3
PS8823B 04/27/07
PI6C10806
1.8V/2.5V Low Skew 1:6 Crystal to LVCMOS Clock Buffer
1.8V I/O DC Characteristics
(Over Operating Range: T
A
= -40° to 85°C)
Parameters Description
Test Conditions
(1)
2.5V Core Supply
1.8V Core Supply
V
DDO
I/O Supply Voltage
V
IH
Input HIGH Voltage
Logic HIGH level
V
IL
Input LOW Voltage
Logic LOW level
I
L
Input Current
V
DD
= Max, V
IN
= V
DD
or GND I pin
Min.
2.375
1.6
1.6
0.65*V
DD
-0.3
Typ.
(2)
2.5
1.8
1.8
Max.
2.625
2.0
2.0
V
DD
+0.3
0.35*Vdd
15
Units
V
DD
V
μ
A
V
OH
Output High Voltage
V
DD
= Min., V
IN
= V
IH
or V
IL
I
OH
= -2mA
I
OH
= -8mA
I
OL
= 2mA
I
OL
= 8mA
1.2
1.2
V
V
OL
Output Low Voltage
V
DD
= Min., V
IN
= V
IH
or V
IL
0.35
0.35
Notes:
1. For Max. or Min. conditions, use appropriate operating Vdd and Ta values.
2. Typical values are at V
CC
= 1.8V, +25°C ambient and maximum loading.
Storage Temperature ..........................................................–65°C to +150°C
V
DDO
,V
DD
Voltage ...............................................................–0.5V to +2.5V
Output Voltage (max 2.5V) .......................................... –0.5V to V
DD
+0.5V
Input Voltage (max 2.5V) ............................................. –0.5V to V
DD
+0.5V
1.8V Absolute Maximum Ratings
(Above which the useful life may be impaired. For user guidelines only, not tested.)
Note:
Stresses greater than those listed under MAXIMUM
RAT NGS may cause permanent damage to the
device. This is a stress rating only and functional op er a ion
of the device at these or any other con di ions above those
indicated in the operational sec ions of this spec
fi
ca ion is
not implied. Ex po sure to absolute maximum rating con di
tions for extended periods may affect re i abil y.
1.8V I/O AC Characteristics
(Over Operating Range: V
DDO
= 1.8V ± 0.2V, T
A
= -40° to 85°C)
Parameters
De scrip ion
2.5V Core Supply
1.8V Core Supply
Test Conditions
(1)
Min.
2.375
1.6
10
0
47
150
Typ
2.5
1.8
Max.
2.625
2.0
40
180
53
800
Units
V
DD
V
f
OUT
Output Frequency
Using Crystal
External Clock
(2)
@ V
DDO
/2
20% to 80%
MHz
t
DC
t
R
/t
F
Output Duty Cycle
CLKn Rise/Fall Time
Output to Output Skew between any two
outputs of the same device @ same transition
Output Enable/Disable
%
ps
t
SK(O)(3)
@V
DDO
/2
60
ps
t
DIS,
t
EN( 4)
Notes:
1. Unless noted otherwise, all parameters are tested with xtal @ f <= Fxtal_max,; outputs are terminated @ 50
Ω
to
V
DDO
/2
, see waveforms.
2. External clock source is driving XTAL_IN input
3. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade.
4. These parameters are guaranteed, but not tested.
Min & Max delay is 4 cycles.
@V
DDO\
/2
4
cycles
07-0112
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