参数资料
| 型号： | PI6C2408-1LE |
| 厂商： | Pericom |
| 文件页数： | 1/10页 |
| 文件大小： | 0K |
| 描述： | IC 4+4 0-DELAY CLK BUFF 16-TSSOP |
| 产品变化通告： | Product Discontinuation 03/Oct/2011 |
| 标准包装： | 96 |
| 类型： | 零延迟缓冲器 |
| PLL： | 带旁路 |
| 输入： | TTL |
| 输出： | TTL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:8 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 140MHz |
| 除法器/乘法器： | 无/无 |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 16-TSSOP |
| 包装： | 管件 |
1
www.pericom.com
PS8589L
04/30/10
PLL
Option (-3, -4)
CLKIN
FB_IN
SEL1
SEL2
Decode
Logic
Decode
Logic
OUTA1
OUTA2
OUTA3
OUTA4
OUTB2
OUTB3
OUTB4
OUTB1
PI6C2408 (-1, -1H, -2, -3, -4)
÷2
PLL
CLKIN
FB_IN
SEL2
SEL1
OUTA1
OUTA2
OUTA3
OUTA4
OUTB2
OUTB3
OUTB4
OUTB1
PI6C2408-6
MUX
÷2
Option (-2, -3)
MUX
1
2
3
VDD 4
GND 5
OUTA2
6
OUTB2 7
SEL1
8
OUTB1
FB_IN
OUTA3
VDD
OUTB4
OUTB3
SEL2
16
15
14
13
12
11
10
9
CLKIN
OUTA1
GND
OUTA4
16-Pin
W, L
Features
Maximum rated frequency: 140 MHz
Low cycle-to-cycle jitter
Input to output delay, less than 150ps
External feedback pin allows outputs to be synchronized
to the clock input
5V tolerant CLKIN input
Operates at 3.3V VDD
Test mode allows bypass of the PLL for system testing
purposes (e.g., IBIS measurements)
Clock frequency multipliers x to 4x dependent on option
Packaging (Pb-free and Green available):
à
16-pin, 150-mil SOIC (W)
à
16-pin 173-mil TSSOP (L)
Description
The PI6C2408 is a PLL-based, zero-delay buffer, with the ability
to distribute eight outputs of up to 140MHz at 3.3V. Two
banks of four outputs exist, and, depending on product option
ordered, can supply either reference frequency, prescaled half
frequency, or multiplied 2x or 4x input clock frequencies. The
PI6C2408 family has a power-sparing feature: when input SEL2
is 0, the component will 3-state one or both banks of outputs
depending on the state of input SEL1. A PLL bypass test mode
also exists. This product line is available in high-drive and
industrial environment versions.
An external feedback pin is used to synchronize the outputs to
the input; the relationship between loading of this signal and the
other outputs determines the input-output delay.
The PI6C2408 is characterized for both commercial and indus-
trial operation.
Block Diagram
Pin Configuration
PI6C2408
3.3V 4+4 Ouptut Zero-delay Clock Driver
11-0005
相关PDF资料 |
PDF描述 |
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| D38999/24FG11PALC | CONN HSG RCPT 11POS JAM NUT PINS |
| PI6C2408-1HWE | IC 4+4 0-DELAY CLK BUFF 16-SOIC |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| PI6C2408-1LEX | 功能描述:锁相环 - PLL 4+4 Zero Delay Clock Buffer RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| PI6C2408-1LI | 制造商:未知厂家 制造商全称:未知厂家 功能描述:EIGHT DISTRIBUTED-OUTPUT CLOCK DRIVER|CMOS|TSSOP|16PIN|PLASTIC |
| PI6C2408-1LIE | 功能描述:锁相环 - PLL 4+4 Zero Delay Clock Buffer RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| PI6C2408-1LIEX | 功能描述:锁相环 - PLL 4+4 Zero Delay Clock Buffer RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| PI6C2408-1W | 制造商:PERICOM 制造商全称:Pericom Semiconductor Corporation 功能描述:Zero-Delay Clock Buffer |
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