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参数资料
| 型号： | PI6C39912-5J |
| 英文描述： | Eight Distributed-Output Clock Driver |
| 中文描述： | 八分布式输出时钟驱动器 |
| 文件页数： | 8/10页 |
| 文件大小： | 544K |
| 代理商： | PI6C39912-5J |
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PI6C3Q991, PI6CQ3993
8
PS8449A 10/09/00
t
REF
t
RPWH
t
ODCV
t
SKEWPR
t
SKEW0, 1
t
SKEW3,4
t
SKEW3,4
t
SKEW3,4
t
SKEW2,4
t
SKEW1,3,4
t
SKEWPR
t
SKEW0, 1
t
PD
t
ODCV
t
RPWL
t
JR
REF
FB
Q
Other Q
Inverted Q
REF Divided by 2
REF Divided by 4
t
SKEW2
t
SKEW2
l
b
m
y
S
n
o
D
.
M
.
a
M
s
U
t
R
t
F
V
0
o
V
8
,
m
i
d
n
a
e
p
n
m
u
m
i
a
M
0
1
V
/
t
C
W
P
W
O
L
r
H
G
I
H
,
p
k
c
o
t
p
n
3
s
D
H
e
c
y
d
t
p
n
0
1
0
9
%
Table 12. Input Timing Requirements
Notes:
1. Input timing requirements are guaranteed by design but not tested. Where pulse width implied by D
H
is
less than t
PWC
limit, t
PWC
limit applies.
AC Timing Diagram
Notes:
V
CCQ
/PE: The AC timing diagram above applies to V
CCQ
/PE=V
CC
. For V
CCQ
/PE=GND, the negative edge of FB aligns with the negative edge of REF,
divided outputs change on the negative edge of REF, and the positive edges of the divide-by-2 and the divide-by-4 signals align.
Skew:
The time between the earliest and the latest output transition among all outputs for which the same t
U
delay has been selected when all are
loaded with 20pF and terminated with 75Ohm to V
CC
/2.
t
SKEWPR
: The skew between a pair of outputs (xQ0 and xQ1) when all eight outputs are selected for 0t
U
.
t
SKEW0
:
The skew between outputs when they are selected for 0t U.
t
DEV
:
The output-to-output skew between any two devices operating under the same conditions (V
CC
, ambient temperature, air flow, etc.)
t
ODCV
:
The deviation of the output from a 50% duty cycle. Output pulse width variations are included in t
SKEW2
and t
SKEW4
specifications.
t
LOCK
:
The time that is required before synchronization is achieved. This specification is valid only after V
CC
is stable and within normal operating
limits. This parameter is measured from the application of a new signal or frequency at REF or FB until t
PD
is within specified limits.
t
PWH
is measured at 2.0V.
t
PWL
is measured at 0.8V.
t
ORISE
and t
OFALL
are measured between 0.8V and 2.0V.
相关PDF资料 |
PDF描述 |
|---|---|
| PI6C39912J | High Efficiency, 2-Phase Synchronous Step-Down Switching Regulator |
| PI6C3991-5 | Clock IC | 500ps Accuracy. 3.3V. LVTTL. 3.75 to 80 MHz |
| PI6C3991-5I | High Efficiency, 2-Phase Synchronous Step-Down Switching Regulator |
| PI6C3991-5JI | Eight Distributed-Output Clock Driver |
| PI6C3991A | Clock IC | 750ps Accuracy. 3.3V. LVTTL. 3.75 to 80 MHz |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PI6C39912J | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Eight Distributed-Output Clock Driver |
| PI6C3991-2J | 制造商:PERICOM 制造商全称:Pericom Semiconductor Corporation 功能描述:3.3V High-Speed, Low-Voltage Programmable Skew Clock Buffer SuperClock |
| PI6C3991-2JE | 功能描述:锁相环 - PLL Programmable Skew Zero Delay RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| PI6C3991-5 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Clock IC | 500ps Accuracy. 3.3V. LVTTL. 3.75 to 80 MHz |
| PI6C3991-5I | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Clock IC | 500ps Accuracy. 3.3V. LVTTL. 3.75 to 80 MHz. Industrial Temp. Operation |
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