参数资料
型号: PI7C8150ANDE
厂商: Pericom
文件页数: 85/111页
文件大小: 0K
描述: IC PCI-PCI BRIDGE 2PORT 256-PBGA
标准包装: 90
系列: *
应用: *
接口: *
电源电压: *
封装/外壳: 256-BGA
供应商设备封装: 256-PBGA(17x17)
包装: 管件
安装类型: 表面贴装
PI7C8150A
2-PORT PCI-TO-PCI BRIDGE
Page 75 of 111
APRIL 2006 – Revision 1.1
P_CBE [3:0]
Command
Action
0001
Special Cycle
Do not claim. Ignore.
0010
I/O Read
1. If address is within pass through I/O range, claim and pass
through.
2. Otherwise, do not pass through and do not claim for
internal access.
0011
I/O Write
Same as I/O Read.
0100
Reserved
-----
0101
Reserved
-----
0110
Memory Read
1. If address is within pass through memory range, claim and
pass through.
2. If address is within pass through memory mapped I/O
range, claim and pass through.
3. Otherwise, do not pass through and do not claim for
internal access.
0111
Memory Write
Same as Memory Read.
1000
Reserved
-----
1001
Reserved
-----
1010
Configuration Read
Type 0 Configuration Read:
If the bridge’s IDSEL line is asserted, perform function
decode and claim if target function is implemented.
Otherwise, ignore. If claimed, permit access to target
function’s configuration registers. Do not pass through
under any circumstances.
Type 1 Configuration Read:
1. If the target bus is the bridge’s secondary bus: claim and
pass through as a Type 0 Configuration Read.
2. If the target bus is a subordinate bus that exists behind the
bridge (but not equal to the secondary bus): claim and pass
through as a Type 1 Configuration Read.
3. Otherwise, ignore.
1011
Configuration Write
Type 0 Configuration Write: same as Configuration
Read.
Type 1 Configuration Write (not special cycle request):
1. If the target bus is the bridge’s secondary bus: claim and
pass through as a Type 0 Configuration Write
2. If the target bus is a subordinate bus that exists behind the
bridge (but not equal to the secondary bus): claim and pass
through unchanged as a Type 1 Configuration Write.
3. Otherwise, ignore.
Configuration Write as Special Cycle Request
(device = 1Fh, function = 7h)
1. If the target bus is the bridges secondary bus:
claim and pass through as a special cycle.
2. If the target bus is a subordinate bus that exists
behind the bridge (but not equal to the secondary
bus): claim and pass through unchanged as a type
1 Configuration Write.
3. Otherwise ignore
1100
Memory Read
Multiple
Same as Memory Read
1101
Dual Address Cycle
Supported
1110
Memory Read Line
Same as Memory Read
06-0057
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