参数资料
型号: PIC10F202-I/P
厂商: Microchip Technology
文件页数: 49/94页
文件大小: 0K
描述: IC PIC MCU FLASH 512X12 8DIP
产品培训模块: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
标准包装: 60
系列: PIC® 10F
核心处理器: PIC
芯体尺寸: 8-位
速度: 4MHz
外围设备: POR,WDT
输入/输出数: 3
程序存储器容量: 768B(512 x 12)
程序存储器类型: 闪存
RAM 容量: 24 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 5.5 V
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 8-DIP(0.300",7.62mm)
包装: 管件
产品目录页面: 637 (CN2011-ZH PDF)
配用: AC162059-ND - HEADER INTRFC MPLAB ICD2 8/14PIN
54
AT89/83EB5114
4311C–8051–02/08
WatchDog Timer
AT8xEB5114 contains a powerful programmable hardware WatchDog Timer (WDT) that
automatically resets the chip if its software fails to reset the WDT before the selected
time interval has elapsed. It permits large Time-Out ranking from 16 ms to 2s @Fosc =
12 MHz.
This WDT consists of a 14-bit counter plus a 7-bit programmable counter, a WatchDog
Timer reset register (WDTRST) and a WatchDog Timer programmation (WDTPRG) reg-
ister. When exiting reset, the WDT is -by default- disabled. To enable the WDT, the user
has to write the sequence 1EH and E1H into WDRST register. When the WatchDog
Timer is enabled, it will increment every machine cycle while the oscillator is running
and there is no way to disable the WDT except through reset (either hardware reset or
WDT overflow reset). When WDT overflows, it will generate an output RESET pulse at
the RST pin. The RESET pulse duration is 96xTOSC, where TOSC=1/FOSC. To make the
best use of the WDT, it should be serviced in those sections of code that will periodically
be executed within the time required to prevent a WDT reset.
The WDT is controlled by two registers (WDTRST and WDTPRG)
Figure 24. WatchDog Timer
RESET
Decoder
Control
WDTRST
WR
Enable
14-bit COUNTER
7-bit COUNTER
Outputs
F CPU_PERIPH
RESET
-
2
1
0
WDTPRG
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