参数资料
型号: PIC10F204-I/P
厂商: Microchip Technology
文件页数: 18/94页
文件大小: 0K
描述: IC PIC MCU FLASH 256X12 8DIP
产品培训模块: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
标准包装: 60
系列: PIC® 10F
核心处理器: PIC
芯体尺寸: 8-位
速度: 4MHz
外围设备: POR,WDT
输入/输出数: 3
程序存储器容量: 384B(256 x 12)
程序存储器类型: 闪存
RAM 容量: 16 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 5.5 V
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 8-DIP(0.300",7.62mm)
包装: 管件
产品目录页面: 637 (CN2011-ZH PDF)
配用: AC103003-ND - BOARD DEMO PIC10F CAP TOUCH
AC162059-ND - HEADER INTRFC MPLAB ICD2 8/14PIN
2007 Microchip Technology Inc.
DS41239D-page 23
PIC10F200/202/204/206
4.9
Indirect Data Addressing: INDF
and FSR Registers
The INDF register is not a physical register. Addressing
INDF actually addresses the register whose address is
contained in the FSR register (FSR is a pointer). This is
indirect addressing.
4.10
Indirect Addressing
Register file 09 contains the value 10h
Register file 0A contains the value 0Ah
Load the value 09 into the FSR register
A read of the INDF register will return the value
of 10h
Increment the value of the FSR register by one
(FSR = 0A)
A read of the INDR register now will return the
value of 0Ah.
Reading INDF itself indirectly (FSR = 0) will produce
00h. Writing to the INDF register indirectly results in a
no operation (although Status bits may be affected).
A simple program to clear RAM locations 10h-1Fh
using indirect addressing is shown in Example 4-1.
EXAMPLE 4-1:
HOW TO CLEAR RAM
USING INDIRECT
ADDRESSING
The FSR is a 5-bit wide register. It is used in conjunc-
tion with the INDF register to indirectly address the data
memory area.
The FSR<4:0> bits are used to select data memory
addresses 00h to 1Fh.
FIGURE 4-6:
DIRECT/INDIRECT ADDRESSING (PIC10F200/202/204/206)
Note:
PIC10F200/202/204/206 – Do not use
banking. FSR <7:5> are unimplemented
and read as ‘1’s.
MOVLW
0x10
;initialize pointer
MOVWF
FSR
;to RAM
NEXT
CLRF
INDF
;clear INDF
;register
INCF
FSR,F
;inc pointer
BTFSC
FSR,4
;all done?
GOTO
NEXT
;NO, clear next
CONTINUE
:
;YES, continue
:
Note 1: For register map detail, see Section 4.3 “Data Memory Organization”.
Location Select
Indirect Addressing
Direct Addressing
Data
Memory(1)
0Fh
10h
Bank 0
0
4
(FSR)
00h
1Fh
(opcode)
0
4
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