- 您现在的位置：买卖IC网 > PDF目录3883 > PIC12C671T-04I/MF (Microchip Technology)IC MCU OTP 1KX14 W/AD 8-DFN PDF资料下载
参数资料
| 型号： | PIC12C671T-04I/MF |
| 厂商： | Microchip Technology |
| 文件页数： | 60/129页 |
| 文件大小： | 0K |
| 描述： | IC MCU OTP 1KX14 W/AD 8-DFN |
| 标准包装： | 3,300 |
| 系列： | PIC® 12C |
| 核心处理器： | PIC |
| 芯体尺寸： | 8-位 |
| 速度： | 4MHz |
| 外围设备： | POR，WDT |
| 输入/输出数： | 5 |
| 程序存储器容量： | 1.75KB（1K x 14） |
| 程序存储器类型： | OTP |
| RAM 容量： | 128 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 3 V ~ 5.5 V |
| 数据转换器： | A/D 4x8b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-VDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 配用： | XLT08SO-1-ND - SOCKET TRANSITION 8SOIC 150/208 AC164324-ND - MODULE SKT FOR MPLAB 8DFN/16QFN XLT08DFN2-ND - SOCKET TRANSITION ICE 14DIP/8DFN XLT08DFN-ND - SOCKET TRANSITION ICE 8DFN AC164032-ND - ADAPTER PICSTART PLUS 8DFN/DIP AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页当前第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页
PIC12C67X
DS30561B-page 36
1999 Microchip Technology Inc.
6.3
Write Operations
6.3.1
BYTE WRITE
Following the start signal from the processor, the
device code (4 bits), the don’t care bits (3 bits), and the
R/W bit (which is a logic low) are placed onto the bus
by the processor. This indicates to the addressed
EEPROM that a byte with a word address will follow
after it has generated an acknowledge bit during the
ninth clock cycle. Therefore, the next byte transmitted
by the processor is the word address and will be written
into the address pointer. Only the lower four address
bits are used by the device, and the upper four bits are
don’t cares. If the address byte is acknowledged, the
processor will then transmit the data word to be written
into the addressed memory location. The memory
acknowledges again and the processor generates a
stop condition. This initiates the internal write cycle,
and during this time will not generate acknowledge sig-
nals. After a byte write command, the internal address
counter will not be incremented and will point to the
same address location that was just written. If a stop bit
sequence is transmitted to the device at any point in the
write command sequence before the entire sequence
is complete, then the command will abort and no data
will be written. If more than 8 data bits are transmitted
before the stop bit sequence is sent, then the device will
clear the previously loaded byte and begin loading the
data buffer again. If more than one data byte is trans-
mitted to the device and a stop bit is sent before a full
eight data bits have been transmitted, then the write
command will abort and no data will be written. The
EEPROM memory employs a VCC threshold detector
circuit, which disables the internal erase/write logic if
the VCC is below minimum VDD. Byte write operations
must be preceded and immediately followed by a bus
not busy bus cycle where both SDA and SCL are held
high. (See Figure 6-7 for Byte Write operation.)
6.4
Acknowledge Polling
Since the EEPROM will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the stop condition for a write com-
mand has been issued from the processor, the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the proces-
sor sending a start condition followed by the control
byte for a write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If no ACK is returned, then the start bit and control byte
must be re-sent. If the cycle is complete, then the
device will return the ACK and the processor can then
proceed with the next read or write command. (See
Figure 6-6 for flow diagram.)
FIGURE 6-6:
ACKNOWLEDGE POLLING
FLOW
FIGURE 6-7:
BYTE WRITE
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did EEPROM
Acknowledge
(ACK = 0)?
Next
Operation
NO
YES
S
P
SDA LINE
S
T
A
R
T
S
T
O
P
CONTROL
BYTE
WORD
ADDRESS
DATA
A
C
K
A
C
K
A
C
K
10
X
10
X
XX
X = Don’t Care Bit
XX
X
0
ACTIVITY
相关PDF资料 |
PDF描述 |
|---|---|
| PIC12C508AT-04I/MF | IC MCU OTP 512X12 8-DFN |
| PIC12LC672T-04I/MF | IC MCU OTP 2KX14 LV W/AD 8-DFN |
| PIC16F72T-E/SO | IC PIC MCU FLASH 2KX14 28-SOIC |
| PIC16LC73BT-04I/ML | IC MCU OTP 4KX14 LV W/AD 28-QFN |
| PIC16LC72AT-04I/ML | IC MCU OTP 2KX14 LV W/AD 28-QFN |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PIC12C671T-10 | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8-Pin, 8-Bit CMOS Microcontroller with A/D Converter |
| PIC12C671T-10/JM | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8-Pin, 8-Bit CMOS Microcontroller with A/D Converter |
| PIC12C671T-10/P | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8-Pin, 8-Bit CMOS Microcontroller with A/D Converter |
| PIC12C671T-10/SM | 功能描述:8位微控制器 -MCU 1.75KB 128 RAM 6 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| PIC12C671T-10E | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8-Pin, 8-Bit CMOS Microcontroller with A/D Converter |
发布紧急采购，3分钟左右您将得到回复。