参数资料
型号: PIC12C672-10/SM
厂商: Microchip Technology
文件页数: 84/129页
文件大小: 0K
描述: IC MCU OTP 2KX14 A/D 8-SOIJ
产品培训模块: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
标准包装: 90
系列: PIC® 12C
核心处理器: PIC
芯体尺寸: 8-位
速度: 10MHz
外围设备: POR,WDT
输入/输出数: 5
程序存储器容量: 3.5KB(2K x 14)
程序存储器类型: OTP
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 5.5 V
数据转换器: A/D 4x8b
振荡器型: 内部
工作温度: 0°C ~ 70°C
封装/外壳: 8-SOIC(0.209",5.30mm 宽)
包装: 管件
配用: XLT08SO-1-ND - SOCKET TRANSITION 8SOIC 150/208
AC164312-ND - MODULE SKT FOR PM3 16SOIC
ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
309-1048-ND - ADAPTER 8-SOIC TO 8-DIP
309-1047-ND - ADAPTER 8-SOIC TO 8-DIP
AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC
其它名称: PIC12C672-10/SMR
PIC12C672-10/SMR-ND
PIC12C67X
DS30561B-page 58
1999 Microchip Technology Inc.
9.4
Power-on Reset (POR), Power-up
Timer (PWRT) and Oscillator Start-up
Timer (OST)
9.4.1
POWER-ON RESET (POR)
The on-chip POR circuit holds the chip in reset until
VDD has reached a high enough level for proper opera-
tion. To take advantage of the POR, just tie the MCLR
pin through a resistor to VDD. This will eliminate exter-
nal RC components usually needed to create a Power-
on Reset. A maximum rise time for VDD is specified.
See Electrical Specifications for details.
When the device starts normal operation (exits the
reset condition), device operating parameters (voltage,
frequency, temperature, ...) must be met to ensure
operation. If these conditions are not met, the device
must be held in reset until the operating conditions are
met.
For additional information, refer to Application Note
AN607, "
Power-up Trouble Shooting."
9.4.2
POWER-UP TIMER (PWRT)
The Power-up Timer provides a fixed 72 ms nominal
time-out on power-up only, from the POR. The Power-
up Timer operates on an internal RC oscillator. The
chip is kept in reset as long as the PWRT is active. The
PWRT’s time delay allows VDD to rise to an acceptable
level. A configuration bit is provided to enable/disable
the PWRT.
The power-up time delay will vary from chip to chip due
to VDD, temperature and process variation. See
9.4.3
OSCILLATOR START-UP TIMER (OST)
The Oscillator Start-up Timer (OST) provides 1024
oscillator cycle (from OSC1 input) delay after the
PWRT delay is over. This ensures that the crystal oscil-
lator or resonator has started and stabilized.
The OST time-out is invoked only for XT, LP and HS
modes and only on Power-on Reset or wake-up from
SLEEP.
9.4.4
TIME-OUT SEQUENCE
On power-up, the Time-out Sequence is as follows:
first, PWRT time-out is invoked after the POR time
delay has expired; then, OST is activated. The total
time-out will vary, based on oscillator configuration and
the status of the PWRT. For example, in RC mode with
the PWRT disabled, there will be no time-out at all.
sequences on power-up.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then
bringing MCLR high will begin execution immediately
(Figure 9-9). This is useful for testing purposes or to
synchronize more than one PIC12C67X device operat-
ing in parallel.
9.4.5
POWER CONTROL (PCON)/STATUS
REGISTER
The Power Control/Status Register, PCON (address
8Eh), has one bit. See Register 4-6 for register.
Bit1 is POR (Power-on Reset). It is cleared on a Power-
on Reset and is unaffected otherwise. The user sets
this bit following a Power-on Reset. On subsequent
resets, if POR is ‘0’, it will indicate that a Power-on
Reset must have occurred.
TABLE 9-4:
TIME-OUT IN VARIOUS SITUATIONS
TABLE 9-5:
STATUS/PCON BITS AND THEIR SIGNIFICANCE
Legend: u = unchanged, x = unknown.
Oscillator Configuration
Power-up
Wake-up from SLEEP
PWRTE = 0
PWRTE = 1
XT, HS, LP
72 ms + 1024TOSC
1024TOSC
INTRC, EXTRC
72 ms
POR
TO
PD
01
1
Power-on Reset
00
x
Illegal, TO is set on POR
0x
0
Illegal, PD is set on POR
10
u
WDT Reset
10
0
WDT Wake-up
1u
u
MCLR Reset during normal operation
11
0
MCLR Reset during SLEEP or interrupt wake-up from SLEEP
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