参数资料
型号: PIC12CE519T-04I/SN
厂商: Microchip Technology
文件页数: 22/113页
文件大小: 0K
描述: IC MCU OTP 1KX12 W/EE 8SOIC
产品培训模块: Asynchronous Stimulus
标准包装: 3,300
系列: PIC® 12C
核心处理器: PIC
芯体尺寸: 8-位
速度: 4MHz
外围设备: POR,WDT
输入/输出数: 5
程序存储器容量: 1.5KB(1K x 12)
程序存储器类型: OTP
EEPROM 大小: 16 x 8
RAM 容量: 41 x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 5.5 V
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
配用: 309-1046-ND - ADAPTER 8-SOIC TO 8-DIP
309-1045-ND - ADAPTER 8-SOIC TO 8-DIP
其它名称: PIC12CE519T-04ISN
PIC12C5XX
DS40139E-page 16
1999 Microchip Technology Inc.
4.3
STATUS Register
This register contains the arithmetic status of the ALU,
the RESET status, and the page preselect bit for
program memories larger than 512 words.
The STATUS register can be the destination for any
instruction, as with any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to
the device logic. Furthermore, the TO and PD bits are
not writable. Therefore, the result of an instruction with
the STATUS register as destination may be different
than intended.
For example, CLRF STATUS will clear the upper three
bits and set the Z bit. This leaves the STATUS register
as 000u u1uu (where u = unchanged).
It is recommended, therefore, that only BCF, BSF and
MOVWF
instructions be used to alter the STATUS
register because these instructions do not affect the Z,
DC or C bits from the STATUS register. For other
instructions, which do
affect STATUS bits, see
Instruction Set Summary.
FIGURE 4-4:
STATUS REGISTER (ADDRESS:03h)
R/W-0
R-1
R/W-x
GPWUF
PA0
TO
PD
Z
DC
C
R = Readable bit
W = Writable bit
- n = Value at POR reset
bit7
6
5
4
3
2
1
bit0
bit 7:
GPWUF: GPIO reset bit
1 = Reset due to wake-up from SLEEP on pin change
0 = After power up or other reset
bit 6:
Unimplemented
bit 5:
PA0: Program page preselect bits
1 = Page 1 (200h - 3FFh) - PIC12C509, PIC12C509A, PIC12CR509A and PIC12CE519
0 = Page 0 (000h - 1FFh) - PIC12C5XX
Each page is 512 bytes.
Using the PA0 bit as a general purpose read/write bit in devices which do not use it for program
page preselect is not recommended since this may affect upward compatibility with future products.
bit 4:
TO: Time-out bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
bit 3:
PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
bit 2:
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
bit 1:
DC: Digit carry/borrow bit (for ADDWF and SUBWF instructions)
ADDWF
1 = A carry from the 4th low order bit of the result occurred
0 = A carry from the 4th low order bit of the result did not occur
SUBWF
1 = A borrow from the 4th low order bit of the result did not occur
0 = A borrow from the 4th low order bit of the result occurred
bit 0:
C: Carry/borrow bit (for ADDWF, SUBWF and RRF, RLF instructions)
ADDWF
SUBWF
RRF or RLF
1 = A carry occurred
1 = A borrow did not occur
Load bit with LSB or MSB, respectively
0 = A carry did not occur
0 = A borrow occurred
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