参数资料
型号: PIC12F1840-E/P
厂商: Microchip Technology
文件页数: 105/122页
文件大小: 0K
描述: MCU 7KB FLASH 256B RAM XLP 8PDIP
产品培训模块: 8-bit PIC® Microcontroller Portfolio
标准包装: 60
系列: PIC® XLP™ 12F
核心处理器: PIC
芯体尺寸: 8-位
速度: 32MHz
连通性: I²C,LIN,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 5
程序存储器容量: 7KB(4K x 14)
程序存储器类型: 闪存
EEPROM 大小: 256 x 8
RAM 容量: 256 x 8
电压 - 电源 (Vcc/Vdd): 2.3 V ~ 5.5 V
数据转换器: A/D 4x10b
振荡器型: 内部
工作温度: -40°C ~ 125°C
封装/外壳: 8-DIP(0.300",7.62mm)
包装: 管件
2011 Microchip Technology Inc.
Preliminary
DS41441B-page 83
PIC12(L)F1840
8.5.1
INTCON REGISTER
The INTCON register is a readable and writable
register, which contains the various enable and flag bits
for TMR0 register overflow, interrupt-on-change and
external INT pin interrupts.
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User software should ensure the appropri-
ate interrupt flag bits are clear prior to
enabling an interrupt.
REGISTER 8-1:
INTCON: INTERRUPT CONTROL REGISTER
R/W-0/0
R-0/0
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
INTF
IOCIF
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7
GIE:
Global Interrupt Enable bit
1
= Enables all active interrupts
0
= Disables all interrupts
bit 6
PEIE:
Peripheral Interrupt Enable bit
1
= Enables all active peripheral interrupts
0
= Disables all peripheral interrupts
bit 5
TMR0IE:
Timer0 Overflow Interrupt Enable bit
1
= Enables the Timer0 interrupt
0
= Disables the Timer0 interrupt
bit 4
INTE:
INT External Interrupt Enable bit
1
= Enables the INT external interrupt
0
= Disables the INT external interrupt
bit 3
IOCIE:
Interrupt-on-Change Enable bit
1
= Enables the interrupt-on-change
0
= Disables the interrupt-on-change
bit 2
TMR0IF:
Timer0 Overflow Interrupt Flag bit
1
= TMR0 register has overflowed
0
= TMR0 register did not overflow
bit 1
INTF:
INT External Interrupt Flag bit
1
= The INT external interrupt occurred
0
= The INT external interrupt did not occur
bit 0
IOCIF:
Interrupt-on-Change Interrupt Flag bit(1)
1
= When at least one of the interrupt-on-change pins changed state
0
= None of the interrupt-on-change pins have changed state
Note 1:
The IOCIF Flag bit is read-only and cleared when all the Interrupt-on-Change flags in the IOCAF register
have been cleared by software.
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