参数资料
| 型号： | PIC12F508-I/P |
| 厂商： | Microchip Technology |
| 文件页数： | 8/44页 |
| 文件大小： | 0K |
| 描述： | IC MCU FLASH 512X12 8DIP |
| 产品培训模块： | Asynchronous Stimulus 8-bit PIC® Microcontroller Portfolio |
| 标准包装： | 60 |
| 系列： | PIC® 12F |
| 核心处理器： | PIC |
| 芯体尺寸： | 8-位 |
| 速度： | 4MHz |
| 外围设备： | POR，WDT |
| 输入/输出数： | 5 |
| 程序存储器容量： | 768B（512 x 12） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 25 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-DIP（0.300"，7.62mm） |
| 包装： | 管件 |
| 产品目录页面： | 637 (CN2011-ZH PDF) |
| 配用： | AC162059-ND - HEADER INTRFC MPLAB ICD2 8/14PIN DM163029-ND - BOARD PICDEM FOR MECHATRONICS DVA12XP080-ND - ADAPTER DEVICE FOR MPLAB-ICE AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC |
第1页第2页第3页第4页第5页第6页第7页当前第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页
PIC12F508/509/16F505
DS41236E-page 16
2009 Microchip Technology Inc.
3.1
Clocking Scheme/Instruction
Cycle
The clock input (OSC1/CLKIN pin) is internally divided
by four to generate four non-overlapping quadrature
clocks, namely Q1, Q2, Q3 and Q4. Internally, the PC
is incremented every Q1 and the instruction is fetched
from program memory and latched into the instruction
register in Q4. It is decoded and executed during the
following Q1 through Q4. The clocks and instruction
execution flow is shown in Figure 3-3 and Example 3-1.
3.2
Instruction Flow/Pipelining
An instruction cycle consists of four Q cycles (Q1, Q2,
Q3 and Q4). The instruction fetch and execute are
pipelined such that fetch takes one instruction cycle,
while decode and execute take another instruction
cycle. However, due to the pipelining, each instruction
effectively executes in one cycle. If an instruction
causes the PC to change (e.g., GOTO), then two cycles
are required to complete the instruction (Example 3-1).
A fetch cycle begins with the PC incrementing in Q1.
In the execution cycle, the fetched instruction is latched
into the Instruction Register (IR) in cycle Q1. This
instruction is then decoded and executed during the
Q2, Q3 and Q4 cycles. Data memory is read during Q2
(operand read) and written during Q4 (destination
write).
FIGURE 3-3:
CLOCK/INSTRUCTION CYCLE
EXAMPLE 3-1:
INSTRUCTION PIPELINE FLOW
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
Q1
Q2
Q3
Q4
OSC1
Q1
Q2
Q3
Q4
PC
PC + 1
PC + 2
Fetch INST (PC)
Execute INST (PC – 1)
Fetch INST (PC + 1)
Execute INST (PC)
Fetch INST (PC + 2)
Execute INST (PC + 1)
Internal
phase
clock
All instructions are single cycle, except for any program branches. These take two cycles, since the fetch instruction
is “flushed” from the pipeline, while the new instruction is being fetched and then executed.
1. MOVLW 03H
Fetch 1
Execute 1
2. MOVWF PORTB
Fetch 2
Execute 2
3. CALL
SUB_1
Fetch 3
Execute 3
4. BSF
PORTB, BIT1
Fetch 4
Flush
Fetch SUB_1 Execute SUB_1
相关PDF资料 |
PDF描述 |
|---|---|
| PIC16F505-I/SL | IC MCU FLASH 1KX12 14SOIC |
| PIC12F629T-I/SN | IC MCU CMOS 8BIT 1K FLASH 8-SOIC |
| PIC10LF322-I/P | IC MCU 8BIT 896B FLASH 8DIP |
| PIC12F508-I/MC | IC PIC MCU FLASH 512X12 8DFN |
| PIC16F616T-I/SL | IC PIC MCU FLASH 2KX14 14SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PIC12F508-ISN | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8/14-Pin, 8-Bit Flash Microcontrollers |
| PIC12F508-I-SN | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:PIC12F508/509 Rev. A Silicon/Data Sheet Errata |
| PIC12F508T | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8/14-Pin, 8-Bit Flash Microcontrollers |
| PIC12F508TE/MC | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8/14-Pin, 8-Bit Flash Microcontrollers |
| PIC12F508TE/MG | 制造商:MICROCHIP 制造商全称:Microchip Technology 功能描述:8/14-Pin, 8-Bit Flash Microcontrollers |
发布紧急采购，3分钟左右您将得到回复。