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参数资料
| 型号： | PIC12F675T-I/MF |
| 厂商： | Microchip Technology |
| 文件页数： | 13/35页 |
| 文件大小： | 0K |
| 描述： | IC MCU CMOS 1K FLASH W/AD 8-DFN |
| 产品培训模块： | Asynchronous Stimulus 8-bit PIC® Microcontroller Portfolio |
| 标准包装： | 3,300 |
| 系列： | PIC® 12F |
| 核心处理器： | PIC |
| 芯体尺寸： | 8-位 |
| 速度： | 20MHz |
| 外围设备： | POR，WDT |
| 输入/输出数： | 5 |
| 程序存储器容量： | 1.75KB（1K x 14） |
| 程序存储器类型： | 闪存 |
| EEPROM 大小： | 128 x 8 |
| RAM 容量： | 64 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 数据转换器： | A/D 4x10b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-VDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 配用： | AC164324-ND - MODULE SKT FOR MPLAB 8DFN/16QFN XLT08DFN2-ND - SOCKET TRANSITION ICE 14DIP/8DFN XLT08DFN-ND - SOCKET TRANSITION ICE 8DFN AC164032-ND - ADAPTER PICSTART PLUS 8DFN/DIP AC124001-ND - MODULE SKT PROMATEII 8DIP/SOIC |
| 其它名称： | PIC12F675-I/MFTR PIC12F675T-I/MFTR PIC12F675T-I/MFTR-ND |
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AT89S53
0787E–MICRO–3/06
20
Reading the Signature Bytes: The signature bytes are
read by the same procedure as a normal verification of
locations 030H and 031H, except that P3.6 and P3.7 must
be pulled to a logic low. The values returned are as follows:
(030H) = 1EH indicates manufactured by Atmel
(031H) = 53H indicates 89S53
Programming Interface
Every code byte in the Flash array can be written, and the
entire array can be erased, by using the appropriate combi-
nation of control signals. The write operation cycle is self-
timed and once initiated, will automatically time itself to
completion.
All major programming vendors offer worldwide support for
the Atmel microcontroller series. Please contact your local
programming vendor for the appropriate software revision.
Serial Downloading
The Code memory array can be programmed using the
serial SPI bus while RST is pulled to V
CC. The serial inter-
face consists of pins SCK, MOSI (input) and MISO (output).
After RST is set high, the Programming Enable instruction
needs to be executed first before program/erase operations
can be executed.
An auto-erase cycle is built into the self-timed programming
operation (in the serial mode ONLY) and there is no need
to first execute the Chip Erase instruction unless any of the
lock bits have been programmed. The Chip Erase opera-
tion turns the content of every memory location in the Code
array into FFH.
The Code memory array has an address space of 0000H to
2FFFH.
Either an external system clock is supplied at pin XTAL1 or
a crystal needs to be connected across pins XTAL1 and
XTAL2. The maximum serial clock (SCK) frequency should
be less than 1/40 of the crystal frequency. With a 24 MHz
oscillator clock, the maximum SCK frequency is 600 kHz.
Serial Programming Algorithm
To program and verify the AT89S53 in the serial program-
ming mode, the following sequence is recommended:
1.
Power-up sequence:
Apply power between VCC and GND pins.
Set RST pin to “H”.
If a crystal is not connected across pins XTAL1 and
XTAL2, apply a 3 MHz to 24 MHz clock to XTAL1 pin
and wait for at least 10 milliseconds.
2.
Enable serial programming by sending the Pro-
gramming Enable serial instruction to pin
MOSI/P1.5. The frequency of the shift clock sup-
plied at pin SCK/P1.7 needs to be less than the
CPU clock at XTAL1 divided by 40.
3.
The Code array is programmed one byte at a time
by supplying the address and data together with the
appropriate Write instruction. The selected memory
location is first automatically erased before new
data is written. The write cycle is self-timed and typ-
ically takes less than 2.5 ms at 5V.
4.
Any memory location can be verified by using the
Read instruction which returns the content at the
selected address at serial output MISO/P1.6.
5.
At the end of a programming session, RST can be
set low to commence normal operation.
Power-off sequence (if needed):
Set XTAL1 to “L” (if a crystal is not used).
Set RST to “L”.
Turn V
CC power off.
Serial Programming Instruction
The Instruction Set for Serial Programming follows a 3 byte
protocol and is shown in the following table.
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