参数资料
型号: PIC14000-04I/SP
厂商: Microchip Technology
文件页数: 133/153页
文件大小: 0K
描述: IC MCU OTP 4KX14 A/D 28DIP
产品培训模块: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
标准包装: 15
系列: PIC® 14
核心处理器: PIC
芯体尺寸: 8-位
速度: 4MHz
连通性: I²C
外围设备: POR,温度传感器,WDT
输入/输出数: 20
程序存储器容量: 7KB(4K x 14)
程序存储器类型: OTP
RAM 容量: 192 x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 6 V
数据转换器: 斜率 A/D
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 28-DIP(0.300",7.62mm)
包装: 管件
配用: ISPICR1-ND - ADAPTER IN-CIRCUIT PROGRAMMING
ICE2000-ND - EMULATOR MPLAB-ICE 2000 POD
PIC14000
DS40122B-page 80
Preliminary
1996 Microchip Technology Inc.
10.5.5
TIMEOUT SEQUENCE
On power-up the time-out sequence is as follows: First
the PWRT time-out is invoked after POR has expired.
The OST is activated only in HS (crystal oscillator)
mode. The total time-out will vary based on the oscilla-
tor conguration and PWRTE status. For example, in
IN mode, with PWRTE unprogrammed (PWRT dis-
abled), there will be no time-out delay at all.
Figure 13-4 depicts the power-on reset time-out
sequences.
Table 10-4 shows the reset conditions for some special
registers, while Table 10-5 shows the reset conditions
for all registers.
FIGURE 10-8: EXTERNAL POWER-ON
RESET CIRCUIT (FOR SLOW
VDD POWER-UP)
1.
External power-on reset circuit is required
only if VDD power-up slope is too slow. The
diode D helps discharge the capacitor
quickly when VDD powers down.
2.
R < 40 K
is recommended to make sure
that voltage drop across R does not exceed
0.2V (max leakage current spec on MCLR
pin is 5
A). A larger voltage drop will
degrade VIH level on MCLR pin.
3.
R1 = 100
to 1 K will limit any current
owing into MCLR from external capacitor C
in the event of MCLR pin breakdown due to
ESD or EOS.
PIC14000
MCLR
VDD
D
C
R1
R
VDD
TABLE 10-4:
RESET CONDITION FOR SPECIAL REGISTERS
Legend: u = unchanged
x = unknown
- = unimplemented, read as ‘0’
Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector
(0004h).
Condition
PCL
Addr: 02h
STATUS
Addr: 03h
PCON
Addr: 8Eh
Power-on Reset
000h
0001 1xxx
0--- --0x
MCLR reset during normal operation
000h
0001 1uuu
u--- --ux
MCLR reset during SLEEP
000h
0001 0uuu
u--- --ux
WDT reset during normal operation
000h
0000 1uuu
u--- --ux
WDT during SLEEP
PC + 1
uuu0 0uuu
u--- --ux
Interrupt wake-up from SLEEP
PC + 1(1)
uuu1 0uuu
u--- --ux
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