参数资料
型号: PIC14000
厂商: Microchip Technology Inc.
英文描述: CTV 22C 22#22D SKT RECP
中文描述: 28引脚可编程混合信号控制器
文件页数: 17/152页
文件大小: 953K
代理商: PIC14000
1996 Microchip Technology Inc.
Preliminary
DS40122B-page 17
PIC14000
4.2.2.1
STATUS REGISTER
The STATUS register, shown in Figure 4-3, contains
the arithmetic status of the ALU, the RESET status and
the bank select bits for data memory.
The STATUS register can be the destination for any
instruction, as with any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended.
For example,
CLRF STATUS
bits and set the Z bit. This leaves the STATUS register
as
000u u1uu
(where
u
= unchanged).
will clear the upper-three
It is recommended, therefore, that only
SWAPF
and
MOVWF
instructions are used to alter the
STATUS register because these instructions do not
affect the Z, C or DC bits from the STATUS register. For
other instructions, not affecting any status bits, see the
“Instruction Set Summary.”
BCF, BSF,
Note 1:
The IRP and RP1 bits (STATUS<7:6>) are
not used by the PIC14000 and should be
programmed as cleared. Use of these bits
as general purpose R/W bits is NOT
recommended, since this may affect
upward compatibility with future products.
The C and DC bits operate as a borrow
and digit borrow out bit, respectively, in
subtraction. See the
instructions for examples.
Note 2:
SUBLW
and
SUBWF
FIGURE 4-3:
STATUS REGISTER
83h
STATUS
Read/Write
POR value FFh
Bit 7
IRP
R/W
0
Bit 6
RP1
R/W
0
Bit 5
RP0
R/W
0
Bit 4
TO
R
1
Bit 3
PD
R
1
Bit 2
Z
R/W
X
Bit 1
DC
R/W
X
Bit 0
C
R/W
X
Bit
Name
Function
B7
IRP
Not used. This bit should be programmed as ‘0’.
Use of this bit as a general purpose read/write bit is not recommended, since this may
affect upward compatibility with future products.
Not used. This bit should be programmed as ‘0’.
Use of this bit as a general purpose read/write bit is not recommended, since this may
affect upward compatibility with future products.
Register page select for direct addressing.
1 = Bank1 (80h - FFh)
0 = Bank0 (00h - 7Fh)
Each page is 128 bytes. Only the RP0 bit is used.
Time-out bit.
1 = After power-up and by the
CLRWDT
and
SLEEP
0 = A watchdog timer time-out has occurred.
Power down bit.
1 = After power-up or by a
CLRWDT
instruction.
0 = By execution of the
SLEEP
instruction.
Zero bit.
1 = The result of an arithmetic or logic operation is zero.
0 = The result of an arithmetic or logical operation is not zero.
Digit carry / borrow bit.
For
ADDWF
and
ADDLW
instructions.
1 = A carry-out from the 4th low order bit of the result.
0 = No carry-out from the 4th low order bit of the result.
Note: For Borrow, the polarity is reversed.
Carry / borrow bit.
For
ADDWF
and
ADDLW
instructions.
1 = A carry-out from the most significant bit of the result occurred. Note that a
subtraction is executed by adding the two’s complement of the second operand. For
rotate (
RRF, RLF
) instructions, this bit is loaded with either the high or low order bit of
the source register.
0 = No carry-out from the most significant bit of the result.
Note: For Borrow the polarity is reversed.
B6
RP1
B5
RP0
B4
TO
instruction.
B3
PD
B2
Z
B1
DC
B0
C
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