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参数资料
型号： PIC16C72A-04E/SS
厂商： Microchip Technology
文件页数： 104/120页
文件大小： 0K
描述： IC MCU OTP 2KX14 A/D PWM 28SSOP
产品培训模块： Asynchronous Stimulus
标准包装： 47
系列： PIC® 16C
核心处理器： PIC
芯体尺寸： 8-位
速度： 4MHz
连通性： I²C，SPI
外围设备： 欠压检测/复位，POR，PWM，WDT
输入/输出数： 22
程序存储器容量： 3.5KB（2K x 14）
程序存储器类型： OTP
RAM 容量： 128 x 8
电压 - 电源 (Vcc/Vdd)： 4 V ~ 5.5 V
数据转换器： A/D 5x8b
振荡器型： 外部
工作温度： -40°C ~ 125°C
封装/外壳： 28-SSOP（0.209"，5.30mm 宽）
包装： 管件
配用： 309-1025-ND - ADAPTER 28-SSOP TO 28-DIP
PIC16C62B/72A
DS35008B-page 84
Preliminary
1998 Microchip Technology Inc.
13.1
DC Characteristics:
PIC16C62B/72A-04 (Commercial, Industrial, Extended)
PIC16C62B/72A-20 (Commercial, Industrial, Extended)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature
0°C
≤ TA ≤ +70°C for commercial
-40°C
≤ TA ≤ +85°C for industrial
-40°C
≤ TA ≤+125°C for extended
Param
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
D001
D001A
VDD
Supply Voltage
4.0
4.5
VBOR*
-
5.5
V
XT, RC and LP osc mode
HS osc mode
BOR enabled (Note 7)
D002*
VDR
RAM Data Retention
Voltage (Note 1)
-1.5
-
V
D003
VPOR
VDD Start Voltage to
ensure internal
Power-on Reset signal
-VSS
-
V
See section on Power-on Reset for details
D004*
D004A*
SVDD
VDD Rise Rate to
ensure internal
Power-on Reset signal
0.05
TBD
-
V/ms PWRT enabled (PWRTE bit clear)
PWRT disabled (PWRTE bit set)
See section on Power-on Reset for details
D005
VBOR
Brown-out Reset
voltage trip point
3.65
-
4.35
V
BODEN bit set
D010
D013
IDD
Supply Current
(Note 2, 5)
-
2.7
10
5
20
mA
XT, RC osc modes
FOSC = 4 MHz, VDD = 5.5V (Note 4)
HS osc mode
FOSC = 20 MHz, VDD = 5.5V
D020
D021
D021B
IPD
Power-down Current
(Note 3, 5)
-
10.5
1.5
2.5
42
16
19
A
VDD = 4.0V, WDT enabled,-40
°C to +85°C
VDD = 4.0V, WDT disabled, 0
°C to +70°C
VDD = 4.0V, WDT disabled,-40
°C to +85°C
VDD = 4.0V, WDT disabled,-40
°C to +125°C
D022*
D022A*
IWDT
IBOR
Module Differential
Current (Note 6)
Watchdog Timer
Brown-out Reset
-
6.0
TBD
20
200
A
WDTE BIT SET, VDD = 4.0V
BODEN bit set, VDD = 5.0V
* These parameters are characterized but not tested.
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Note 1: This is the limit to which VDD can be lowered without losing RAM data.
2: The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin
loading and switching rate, oscillator type, internal code execution pattern, and temperature also have an
impact on the current consumption.
The test conditions for all IDD measurements in active operation mode are:
OSC1 = external square wave, from rail to rail; all I/O pins tristated, pulled to VDD,
MCLR = VDD; WDT enabled/disabled as specified.
3: The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is
measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS.
4: For RC osc mode, current through Rext is not included. The current through the resistor can be estimated by
the formula Ir = VDD/2Rext (mA) with Rext in kOhm.
5: Timer1 oscillator (when enabled) adds approximately 20
A to the specification. This value is from charac-
terization and is for design guidance only. This is not tested.
6: The
current is the additional current consumed when this peripheral is enabled. This current should be
added to the base IDD or IPD measurement.
7: This is the voltage where the device enters the Brown-out Reset. When BOR is enabled, the device will
perform a brown-out reset when VDD falls below VBOR.
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