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参数资料
| 型号： | PIC16F74T-I/L |
| 厂商： | Microchip Technology |
| 文件页数： | 56/104页 |
| 文件大小： | 0K |
| 描述： | IC MCU FLASH 4KX14 A/D 44PLCC |
| 产品培训模块： | Asynchronous Stimulus |
| 标准包装： | 500 |
| 系列： | PIC® 16F |
| 核心处理器： | PIC |
| 芯体尺寸： | 8-位 |
| 速度： | 20MHz |
| 连通性： | I²C，SPI，UART/USART |
| 外围设备： | 欠压检测/复位，POR，PWM，WDT |
| 输入/输出数： | 33 |
| 程序存储器容量： | 7KB（4K x 14） |
| 程序存储器类型： | 闪存 |
| RAM 容量： | 192 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 4 V ~ 5.5 V |
| 数据转换器： | A/D 8x8b |
| 振荡器型： | 外部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 44-LCC（J 形引线） |
| 包装： | 带卷 (TR) |
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Micrel, Inc.
KSZ8851-16MLLJ
March 2010
47
M9999-030210-1.0
On-Chip Bus Control Register (0x20 – 0x21): OBCR
This register controls the on-chip bus clock speed for the KSZ8851-16MLLJ. The default of the on-chip bus clock speed is
125MHz. When the external host CPU is running at a higher clock rate, the on-chip bus should be adjusted for the best
performance.
Bit
Default Value
R/W
Description
15-7
-
RW
Reserved.
6
0
RW
Output Pin Drive Strength
Bi-directional or output pad drive strength selection.
0: 8 mA; 1: 16 mA
5-3
-
RW
Reserved.
2
0
RW
On-Chip Bus Clock Selection
0: 125MHz (default setting is divided by 1, Bit[1:0]=00)
1: NA (reserved)
1-0
0x0
RW
On-Chip Bus Clock Divider Selection
00: Divided by 1; 01: Divided by 2; 10: Divided by 3; 11: NA (reserved).
For example to contol the bus clock speed as below:
If Bit 2 = 0 and this value is set 00 to select 125 MHz.
If Bit 2 = 0 and this value is set 01 to select 62.5 MHz.
EEPROM Control Register (0x22 – 0x23): EEPCR
To support an external EEPROM, pulled-up the EED_IO pin to High; otherwise, it is pulled-down to Low. If an external
EEPROM is not used, the software programs the host MAC address. If an EEPROM is used in the design, the chip host
MAC address is loaded from the EEPROM immediately after reset. The KSZ8851-16MLLJ allows the software to access
(read and write) the EEPROM directly; that is, the EEPROM access timing can be fully controlled by the software if the
EEPROM Software Access bit is set.
Bit
Default Value
R/W
Description
15-6
-
RO
Reserved.
5
0
WO
EESRWA EEPROM Software Read or Write Access
0: software read enable to access EEPROM when software access enabled (bit4=1)
1: software write enable to access EEPROM when software access enabled (bit4=1).
4
0
RW
EESA EEPROM Software Access
1: enable software to access EEPROM through bit 3 to bit 0.
0: disable software to access EEPROM.
3
-
RO
EESB EEPROM Status Bit
Data Receive from EEPROM. This bit directly reads the EED_IO pin.
2-0
0x0
RW
EECB EEPROM Control Bits
Bit 2: Data Transmit to EEPROM. This bit directly controls the device’s EED_IO pin.
Bit 1: Serial Clock. This bit directly controls the device’s EESK pin.
Bit 0: Chip Select for EEPROM. This bit directly controls the device’s EECS pin.
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