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参数资料
| 型号： | PIC16F83A-10/P |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 10 MHz, RISC MICROCONTROLLER, PDIP18 |
| 封装： | 0.300 INCH, PLASTIC, DIP-18 |
| 文件页数： | 24/125页 |
| 文件大小： | 2018K |
| 代理商： | PIC16F83A-10/P |
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PIC16F8X
DS30430C-page 12
1998 Microchip Technology Inc.
4.2
Data Memory Organization
The data memory is partitioned into two areas. The first
is the Special Function Registers (SFR) area, while the
second is the General Purpose Registers (GPR) area.
The SFRs control the operation of the device.
Portions of data memory are banked. This is for both
the SFR area and the GPR area. The GPR area is
banked to allow greater than 116 bytes of general
purpose RAM. The banked areas of the SFR are for the
registers that control the peripheral functions. Banking
requires the use of control bits for bank selection.
These control bits are located in the STATUS Register.
Figure 4-1 and Figure 4-2 show the data memory map
organization.
Instructions MOVWF and MOVF can move values from
the W register to any location in the register file (“F”),
and vice-versa.
The entire data memory can be accessed either
directly using the absolute address of each register file
or indirectly through the File Select Register (FSR)
(Section 4.5). Indirect addressing uses the present
value of the RP1:RP0 bits for access into the banked
areas of data memory.
Data memory is partitioned into two banks which
contain the general purpose registers and the special
function registers. Bank 0 is selected by clearing the
RP0 bit (STATUS<5>). Setting the RP0 bit selects Bank
1. Each Bank extends up to 7Fh (128 bytes). The first
twelve locations of each Bank are reserved for the
Special Function Registers. The remainder are Gen-
eral Purpose Registers implemented as static RAM.
4.2.1
GENERAL PURPOSE REGISTER FILE
All devices have some amount of General Purpose
Register (GPR) area. Each GPR is 8 bits wide and is
accessed either directly or indirectly through the FSR
The GPR addresses in bank 1 are mapped to
addresses in bank 0. As an example, addressing loca-
tion 0Ch or 8Ch will access the same GPR.
4.2.2
SPECIAL FUNCTION REGISTERS
The Special Function Registers (Figure 4-1, Figure 4-2
and Table 4-1) are used by the CPU and Peripheral
functions to control the device operation. These
registers are static RAM.
The special function registers can be classified into two
sets, core and peripheral. Those associated with the
core functions are described in this section. Those
related to the operation of the peripheral features are
described in the section for that specific feature.
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| PIC16F83T-04/SO | 功能描述:8位微控制器 -MCU .875KB 36 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| PIC16F83T-04I/SO | 功能描述:8位微控制器 -MCU .875KB 36 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| PIC16F83T-10/SO | 功能描述:8位微控制器 -MCU .875KB 36 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| PIC16F83T-10I/SO | 功能描述:8位微控制器 -MCU .875KB 36 RAM 13 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| PIC16F84-04/P | 功能描述:8位微控制器 -MCU 1.75KB 68 RAM 13 I/O 4MHz PDIP18 RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
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