参数资料
型号: PIC16F84A-04I/P
厂商: Microchip Technology
文件页数: 9/81页
文件大小: 0K
描述: IC MCU FLASH 1KX14 EE 18DIP
产品培训模块: Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
标准包装: 25
系列: PIC® 16F
核心处理器: PIC
芯体尺寸: 8-位
速度: 4MHz
外围设备: POR,WDT
输入/输出数: 13
程序存储器容量: 1.75KB(1K x 14)
程序存储器类型: 闪存
EEPROM 大小: 64 x 8
RAM 容量: 68 x 8
电压 - 电源 (Vcc/Vdd): 4 V ~ 5.5 V
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 18-DIP(0.300",7.62mm)
包装: 管件
产品目录页面: 638 (CN2011-ZH PDF)
配用: I3-DB16F84A-ND - BOARD DAUGHTER ICEPIC3
DVA16XP180-ND - ADAPTER DEVICE FOR MPLAB-ICE
AC164010-ND - MODULE SKT PROMATEII DIP/SOIC
2001 Microchip Technology Inc.
DS35007B-page 15
PIC16F84A
4.0
I/O PORTS
Some pins for these I/O ports are multiplexed with an
alternate function for the peripheral features on the
device. In general, when a peripheral is enabled, that
pin may not be used as a general purpose I/O pin.
Additional information on I/O ports may be found in the
PICmicro Mid-Range Reference Manual (DS33023).
4.1
PORTA and TRISA Registers
PORTA is a 5-bit wide, bi-directional port. The corre-
sponding data direction register is TRISA. Setting a
TRISA bit (= 1) will make the corresponding PORTA pin
an input (i.e., put the corresponding output driver in a
Hi-Impedance mode). Clearing a TRISA bit (= 0) will
make the corresponding PORTA pin an output (i.e., put
the contents of the output latch on the selected pin).
Reading the PORTA register reads the status of the
pins, whereas writing to it will write to the port latch. All
write operations are read-modify-write operations.
Therefore, a write to a port implies that the port pins are
read. This value is modified and then written to the port
data latch.
Pin RA4 is multiplexed with the Timer0 module clock
input to become the RA4/T0CKI pin. The RA4/T0CKI
pin is a Schmitt Trigger input and an open drain output.
All other RA port pins have TTL input levels and full
CMOS output drivers.
EXAMPLE 4-1:
INITIALIZING PORTA
FIGURE 4-1:
BLOCK DIAGRAM OF
PINS RA3:RA0
FIGURE 4-2:
BLOCK DIAGRAM OF PIN
RA4
Note:
On a Power-on Reset, these pins are con-
figured as inputs and read as '0'.
BCF
STATUS, RP0 ;
CLRF
PORTA
; Initialize PORTA by
; clearing output
; data latches
BSF
STATUS, RP0 ; Select Bank 1
MOVLW
0x0F
; Value used to
; initialize data
; direction
MOVWF
TRISA
; Set RA<3:0> as inputs
; RA4 as output
; TRISA<7:5> are always
; read as ’0’.
Data
Bus
Q
D
Q
CK
Q
D
Q
CK
QD
EN
P
N
WR
Port
WR
TRIS
Data Latch
TRIS Latch
RD TRIS
RD Port
TTL
Input
Buffer
VSS
VDD
I/O pin
Note:
I/O pins have protection diodes to VDD and VSS.
Data
Bus
WR
Port
WR
TRIS
RD Port
Data Latch
TRIS Latch
RD TRIS
Schmitt
Trigger
Input
Buffer
N
VSS
RA4 pin
TMR0 Clock Input
Q
D
Q
CK
Q
D
Q
CK
EN
QD
EN
Note:
I/O pins have protection diodes to VDD and VSS.
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