参数资料
型号: PIC16F871T-E/L
厂商: Microchip Technology
文件页数: 26/143页
文件大小: 0K
描述: IC MCU CMOS 20MHZ 2K FLSH 44PLCC
标准包装: 500
系列: PIC® 16F
核心处理器: PIC
芯体尺寸: 8-位
速度: 20MHz
连通性: UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 33
程序存储器容量: 3.5KB(2K x 14)
程序存储器类型: 闪存
EEPROM 大小: 64 x 8
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 4 V ~ 5.5 V
数据转换器: A/D 8x10b
振荡器型: 外部
工作温度: -40°C ~ 125°C
封装/外壳: 44-LCC(J 形引线)
包装: 带卷 (TR)
2003 Microchip Technology Inc.
DS30569B-page 119
PIC16F870/871
14.1
DC Characteristics: PIC16F870/871 (Industrial, Extended)
PIC16LF870/871 (Commercial, Industrial)
PIC16LF870/871
(Commercial, Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C
≤ TA ≤ +85°C for Industrial
0°C
≤ TA ≤ +70°C for Commercial
PIC16F870/871
(Industrial, Extended)
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C
≤ TA ≤ +85°C for Industrial
-40°C
≤ TA ≤ +125°C for Extended
Param
No.
Sym
Characteristic
Min
Typ Max Units
Conditions
VDD
Supply Voltage
D001
PIC16LF870/871
2.0
5.5
V
All configurations. See Figure 14-2 for
details.
D001
D001A
PIC16F870/871
4.0
VBOR*
VBOR
5.5
V
All configurations.
BOR enabled, FMAX = 14 MHz (Note 7),
-40°C to +85°C
BOR enabled, FMAX = 10 MHz (Note 7),
-40°C to +125°C
D002*
VDR
RAM Data Retention
Voltage(1)
—1.5
V
D003
VPOR
VDD Start Voltage to
ensure internal Power-on
Reset signal
Vss
V
See section on Power-on Reset for details
D004*
SVDD
VDD Rise Rate to ensure
internal Power-on Reset
signal
0.05
V/ms See section on Power-on Reset for details
D005
VBOR
Brown-out Reset
Voltage
3.7
4.0
4.35
V
BOREN bit in configuration word enabled
*
These parameters are characterized but not tested.
Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1:
This is the limit to which VDD can be lowered without losing RAM data.
2:
The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O
pin loading and switching rate, oscillator type, internal code execution pattern and temperature also have
an impact on the current consumption.
The test conditions for all IDD measurements in active Operation mode are:
OSC1 = external square wave, from rail to rail; all I/O pins tri-stated, pulled to VDD
MCLR = VDD; WDT enabled/disabled as specified.
3:
The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is
measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS.
4:
For RC osc configuration, current through REXT is not included. The current through the resistor can be
estimated by the formula Ir = VDD/2REXT (mA) with REXT in k
.
5:
Timer1 oscillator (when enabled) adds approximately 20
A to the specification. This value is from
characterization and is for design guidance only. This is not tested.
6:
The
current is the additional current consumed when this peripheral is enabled. This current should be
added to the base IDD or IPD measurement.
7:
When BOR is enabled, the device will operate correctly until the VBOR voltage trip point is reached.
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